AT26DF161-SU

AT26DF161-SU Datasheet

AT26DF161

Part	Datasheet
AT26DF161-SU	AT26DF161-SU (pdf)

Related Parts	Information
AT26DF161-MU	AT26DF161-MU

PDF Datasheet Preview
• Single 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible Supports SPI Modes 0 and 3 • 66 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture 4-Kbyte Blocks 32-Kbyte Blocks 64-Kbyte Blocks Full Chip Erase • Individual Sector Protection with Global Protect/Unprotect Feature Sixteen 128-Kbyte Physical Sectors • Hardware Controlled Locking of Protected Sectors • Flexible Programming Byte/Page Program 1 to 256 Bytes • Automatic Checking and Reporting of Erase/Program Failures • JEDEC Standard Manufacturer and Device ID Read Methodology • Low Power Dissipation 7 mA Active Read Current Typical 4 µA Deep Power-Down Current Typical • Endurance 100,000 Program/Erase Cycles • Data Retention 20 Years • Complies with Full Industrial Temperature Range • Industry Standard Green Pb/Halide-free/RoHS Compliant Package Options 8-lead SOIC 200-mil wide 8-contact MLF 5 mm x 6 mm 16-megabit 2.7-volt Only Serial Firmware Memory AT26DF161 The AT26DF161 is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the AT26DF161, with its erase granularity as small as 4-Kbytes, makes it ideal for data storage as well, eliminating the need for additional data storage EEPROM devices. The physical sectoring and the erase block sizes of the AT26DF161 have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the physical sectors and erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own protected sectors, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density. See applicable errata in Section The AT26DF161 also offers a sophisticated method for protecting individual sectors against erroneous or malicious program and erase operations. By providing the ability to individually protect and unprotect sectors, a system can unprotect a specific sector to modify its contents while keeping the remaining sectors of the memory array securely protected. This is useful in applications where program code is patched or updated on a subroutine or module basis, or in applications where data storage segments need to be modified without running the risk of errant modifications to the program code segments. In addition to individual sector protection capabilities, the AT26DF161 incorporates Global Protect and Global Unprotect features that allow the entire memory array to be either protected or unprotected all at once. This reduces overhead during the manufacturing process since sectors do not have to be unprotected one-by-one prior to initial programming. Specifically designed for use in 3-volt systems, the AT26DF161 supports read, program, and erase operations with a supply voltage range of 2.7V to 3.6V. No separate voltage is required for programming and erasing. Pin Descriptions and Pinouts Table Pin Descriptions Symbol CS SCK SI SO WP VCC Name and Function CHIP SELECT Asserting the CS pin selects the device. When the CS pin is deasserted, the device will be deselected and normally be placed in standby mode not Deep Power-Down mode , and the SO pin will be in a high-impedance state. When the device is deselected, data will not be accepted on the SI pin. A high-to-low transition on the CS pin is required to start an operation, and a low-to-high transition is required to end an operation. When ending an internally self-timed operation such as a program or erase cycle, the device will not enter the standby mode until the completion of the operation. SERIAL CLOCK This pin is used to provide a clock to the device and is used to control the flow of data to and from the device. Command, address, and input data present on the SI pin is always latched on the rising edge of SCK, while output data on the SO pin is always clocked out on the falling edge of SCK. SERIAL INPUT The SI pin is used to shift data into the device. The SI pin is used for all data input including command and address sequences. Data on the SI pin is always latched on the rising edge of SCK. SERIAL OUTPUT The SO pin is used to shift data out from the device. Data on the SO pin is always clocked out on the falling edge of SCK. WRITE PROTECT The WP pin controls the hardware locking feature of the device. Please refer to “Protection Commands and Features” on page 11 for more details on protection features and the WP pin. The WP pin is internally pulled-high and may be left floating if hardware controlled protection will not be used. However, it is recommended that the WP pin also be externally connected to VCC whenever possible. DEVICE POWER SUPPLY The VCC pin is used to supply the source voltage to the device. Operations at invalid VCC voltages may produce spurious results and should not be attempted. GROUND The ground reference for the power supply. GND should be connected to the system ground. Asserted State Low Type Input Input Output Input Power 2 AT26DF161 Figure 8-SOIC Top View Block Diagram CS 1 SO 2 WP 3 GND 4 8 VCC 7 NC 6 SCK 5 SI AT26DF161 Figure 8-MLF Top View CS 1 SO 2 WP 3 GND 4 8 VCC 7 NC 6 SCK 5 SI CONTROL AND PROTECTION LOGIC SCK SI INTERFACE CONTROL AND LOGIC Y-DECODER X-DECODER Ordering Information Green Package Options Pb/Halide-free/RoHS Compliant fSCK MHz 66 Ordering Code AT26DF161-SU Package 8S2 AT26DF161-MU 8M1-A Operation Range Industrial -40°C to +85°C Package Type 8S2 8M1-A 8-lead, Wide, Plastic Gull Wing Small Outline Package EIAJ SOIC 8-contact, 5 x 6 mm Very Thin Micro Lead-frame Package MLF 30 AT26DF161 Packaging Information 8S2 EIAJ SOIC AT26DF161 TOP VIEW END VIEW COMMON DIMENSIONS Unit of Measure = mm SYMBOL MIN NOM MAX NOTE SIDE VIEW Notes This drawing is for general information only refer to EIAJ Drawing EDR-7320 for additional information. Mismatch of the upper and lower dies and resin burrs are not included. It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded. Determines the true geometric position. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between to mm. 4/7/06 2325 Orchard Parkway R San Jose, CA 95131 TITLE 8S2, 8-lead, Body, Plastic Small Outline Package EIAJ 8M1-A MLF Pin 1 ID 0 SIDE VIEW TOP VIEW A2 Pin #1 Notch BOTTOM VIEW A3 A1 SYMBOL A A1 A2 A3 b D D1 D2 E E1 E2 e L 0 K COMMON DIMENSIONS Unit of Measure = mm MIN NOM MAX NOTE TITLE 2325 Orchard Parkway 8M1-A, 8-pad, 6 x 5 x mm Body, Very Thin Dual Flat Package R San Jose, CA 95131 No Lead MLF 9/8/06 8M1-A 32 AT26DF161 B March 2006 C April 2006 D May 2006 E July 2006 F September 2006 AT26DF161

PDF Datasheet Preview

• Single 2.7V - 3.6V Supply
• Serial Peripheral Interface SPI Compatible

Supports SPI Modes 0 and 3
• 66 MHz Maximum Clock Frequency
• Flexible, Uniform Erase Architecture
4-Kbyte Blocks 32-Kbyte Blocks 64-Kbyte Blocks Full Chip Erase
• Individual Sector Protection with Global Protect/Unprotect Feature Sixteen 128-Kbyte Physical Sectors
• Hardware Controlled Locking of Protected Sectors
• Flexible Programming Byte/Page Program 1 to 256 Bytes
• Automatic Checking and Reporting of Erase/Program Failures
• JEDEC Standard Manufacturer and Device ID Read Methodology
• Low Power Dissipation 7 mA Active Read Current Typical 4 µA Deep Power-Down Current Typical
• Endurance 100,000 Program/Erase Cycles
• Data Retention 20 Years
• Complies with Full Industrial Temperature Range
• Industry Standard Green Pb/Halide-free/RoHS Compliant Package Options 8-lead SOIC 200-mil wide 8-contact MLF 5 mm x 6 mm
16-megabit 2.7-volt Only Serial Firmware Memory

AT26DF161

The AT26DF161 is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the AT26DF161, with its erase granularity as small as 4-Kbytes, makes it ideal for data storage as well, eliminating the need for additional data storage EEPROM devices.

The physical sectoring and the erase block sizes of the AT26DF161 have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the physical sectors and erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own protected sectors, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density.

See applicable errata in Section

The AT26DF161 also offers a sophisticated method for protecting individual sectors against erroneous or malicious program and erase operations. By providing the ability to individually protect and unprotect sectors, a system can unprotect a specific sector to modify its contents while keeping the remaining sectors of the memory array securely protected. This is useful in applications where program code is patched or updated on a subroutine or module basis, or in applications where data storage segments need to be modified without running the risk of errant modifications to the program code segments. In addition to individual sector protection capabilities, the AT26DF161 incorporates Global Protect and Global Unprotect features that allow the entire memory array to be either protected or unprotected all at once. This reduces overhead during the manufacturing process since sectors do not have to be unprotected one-by-one prior to initial programming.

Specifically designed for use in 3-volt systems, the AT26DF161 supports read, program, and erase operations with a supply voltage range of 2.7V to 3.6V. No separate voltage is required for programming and erasing.

Pin Descriptions and Pinouts

Table Pin Descriptions

Symbol CS

SCK SI SO WP VCC

Name and Function

CHIP SELECT Asserting the CS pin selects the device. When the CS pin is deasserted, the device will be deselected and normally be placed in standby mode not Deep Power-Down mode , and the SO pin will be in a high-impedance state. When the device is deselected, data will not be accepted on the SI pin. A high-to-low transition on the CS pin is required to start an operation, and a low-to-high transition is required to end an operation. When ending an internally self-timed operation such as a program or erase cycle, the device will not enter the standby mode until the completion of the operation.

SERIAL CLOCK This pin is used to provide a clock to the device and is used to control the flow of data to and from the device. Command, address, and input data present on the SI pin is always latched on the rising edge of SCK, while output data on the SO pin is always clocked out on the falling edge of SCK.

SERIAL INPUT The SI pin is used to shift data into the device. The SI pin is used for all data input including command and address sequences. Data on the SI pin is always latched on the rising edge of SCK.

SERIAL OUTPUT The SO pin is used to shift data out from the device. Data on the SO pin is always clocked out on the falling edge of SCK.

WRITE PROTECT The WP pin controls the hardware locking feature of the device. Please refer to “Protection Commands and Features” on page 11 for more details on protection features and the WP pin. The WP pin is internally pulled-high and may be left floating if hardware controlled protection will not be used. However, it is recommended that the WP pin also be externally connected to VCC whenever possible.

DEVICE POWER SUPPLY The VCC pin is used to supply the source voltage to the device. Operations at invalid VCC voltages may produce spurious results and should not be attempted.

GROUND The ground reference for the power supply. GND should be connected to the system ground.

Asserted State Low

Type Input

Input Output Input Power
2 AT26DF161

Figure 8-SOIC Top View

Block Diagram

CS 1 SO 2 WP 3 GND 4
8 VCC 7 NC 6 SCK 5 SI

AT26DF161

Figure 8-MLF Top View

CS 1 SO 2 WP 3 GND 4
8 VCC 7 NC 6 SCK 5 SI

CONTROL AND

PROTECTION LOGIC

SCK SI

INTERFACE CONTROL

AND LOGIC

Y-DECODER

X-DECODER
Ordering Information

Green Package Options Pb/Halide-free/RoHS Compliant
fSCK MHz 66
Ordering Code AT26DF161-SU

Package 8S2

AT26DF161-MU
8M1-A

Operation Range

Industrial -40°C to +85°C

Package Type 8S2 8M1-A
8-lead, Wide, Plastic Gull Wing Small Outline Package EIAJ SOIC 8-contact, 5 x 6 mm Very Thin Micro Lead-frame Package MLF
30 AT26DF161

Packaging Information
8S2 EIAJ SOIC

AT26DF161

TOP VIEW

END VIEW

COMMON DIMENSIONS

Unit of Measure = mm

SYMBOL MIN NOM MAX NOTE

SIDE VIEW

Notes This drawing is for general information only refer to EIAJ Drawing EDR-7320 for additional information. Mismatch of the upper and lower dies and resin burrs are not included. It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded. Determines the true geometric position. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between to mm.
4/7/06
2325 Orchard Parkway R San Jose, CA 95131

TITLE 8S2, 8-lead, Body, Plastic Small Outline Package EIAJ
8M1-A MLF

Pin 1 ID
0 SIDE VIEW

TOP VIEW A2

Pin #1 Notch

BOTTOM VIEW

A3 A1

SYMBOL A A1 A2 A3 b D D1 D2 E E1 E2 e L 0 K

COMMON DIMENSIONS Unit of Measure = mm

MIN NOM MAX

NOTE

TITLE 2325 Orchard Parkway 8M1-A, 8-pad, 6 x 5 x mm Body, Very Thin Dual Flat Package

R San Jose, CA 95131 No Lead MLF
9/8/06
8M1-A
32 AT26DF161

B March 2006

C April 2006 D May 2006 E July 2006 F September 2006

AT26DF161

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT26DF161-SU Datasheet file may be downloaded here without warranties.

Datasheet ID: AT26DF161-SU 518922