CY7C128A-35PC

CY7C128A-35PC Datasheet

CY7C128A

Part	Datasheet
CY7C128A-35PC	CY7C128A-35PC (pdf)

Related Parts	Information
CY7C128A-15VC	CY7C128A-15VC
CY7C128A-20VC	CY7C128A-20VC
CY7C128A-35VC	CY7C128A-35VC
CY7C128A-25PC	CY7C128A-25PC
CY7C128A-15PC	CY7C128A-15PC

PDF Datasheet Preview
CY7C128A 2K x 8 Static RAM • Automatic power-down when deselected • CMOS for optimum speed/power • High speed 15 ns • Low active power 660 mW commercial 688 mW ns • Low standby power 110 mW 20 ns • TTL-compatible inputs and outputs • Capable of withstanding greater than 2001V electrostatic discharge • VIH of 2.2V Functional Description The CY7C128A is a high-performance CMOS static RAM organized as 2048 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE , and active LOW Output Enable OE and three-state drivers. The CY7C128A has an automatic power-down feature, reducing the power consumption by 83% when deselected. Writing to the device is accomplished when the Chip Enable CE and Write Enable WE inputs are both LOW. Data on the eight I/O pins I/O0 through I/O7 is written into the memory location specified on the address pins A0 through A10 . Reading the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while Write Enable WE remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the eight I/O pins. The I/O pins remain in high-impedance state when Chip Enable CE or Output Enable OE is HIGH or Write Enable WE is LOW. The CY7C128A utilizes a die coat to insure alpha immunity. Logic Block Diagram Pin Configurations DIP/SOJ/SOIC Top View A10 A9 A8 A7 A6 A5 A4 CE WE ROW DECODER SENSE AMPS INPUT BUFFER 128 x 16 x 8 ARRAY COLUMN DECODER POWER DOWN I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 24 VCC A6 2 A5 3 A4 4 23 A8 22 A9 21 WE 20 OE A2 A1 7 7C128A18 A10 CE I/O0 9 I/O1 10 I/O2 11 GND 12 17 I/O7 16 I/O6 15 I/O5 14 I/O4 13 I/O3 LCC Top View A5 A6 A7 VCC A8 3 2 1 24 23 A4 4 A3 5 A2 6 22 A9 21 WE 20 OE A1 7 7C128A 19 A10 18 CE Ordering Information Speed ns 15 20 Ordering Code CY7C128A-15PC CY7C128A-15VC CY7C128A-15SC CY7C128A-20PC CY7C128A-20VC CY7C128A-20SC CY7C128A-20DMB CY7C128A-20LMB CY7C128A-25PC CY7C128A-25VC CY7C128A-25SC CY7C128A-25DMB CY7C128A-35PC CY7C128A-35VC CY7C128A-35SC CY7C128A-35DMB CY7C128A-45PC CY7C128A-45VC CY7C128A-45SC CY7C128A-45DMB CY7C128A-45LMB Package Name P13 V13 S13 P13 V13 S13 D14 L53 P13 V13 S13 D14 P13 V13 S13 D14 P13 V13 S13 D14 L53 Package Type 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil CerDIP 24-Pin Rectangular Leadless Chip Carrier 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil CerDIP 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil CerDIP 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil CerDIP 24-Pin Rectangular Leadless Chip Carrier Operating Range Commercial Commercial Military Commercial Military Commercial Military Commercial Military Page 6 of 10 [+] Feedback MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter VOH VOL VIH VIL Max. IIX IOZ ICC ISB Subgroups 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 Switching Characteristics Parameter READ CYCLE tRC tAA tOHA tACE tDOE WRITE CYCLE tWC tSCE tAW tHA tSA tPWE tSD tHD Subgroups 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 CY7C128A Page 7 of 10 [+] Feedback Package Diagrams 24-Lead 300-Mil CerDIP D14 MIL-STD-1835 D- 9 Config.A CY7C128A 24-Pin Rectangular Leadless Chip Carrier L53 51-80031 51-80066 Page 8 of 10 [+] Feedback Package Diagrams continued 24-Lead 300-Mil Molded DIP P13/P13A CY7C128A 24-Lead 300-Mil Molded SOJ V13 51-85013-A 51-85030-A Page 9 of 10

PDF Datasheet Preview

CY7C128A
2K x 8 Static RAM
• Automatic power-down when deselected
• CMOS for optimum speed/power
• High speed
15 ns
• Low active power
660 mW commercial 688 mW ns
• Low standby power 110 mW 20 ns
• TTL-compatible inputs and outputs
• Capable of withstanding greater than 2001V electrostatic discharge
• VIH of 2.2V

Functional Description

The CY7C128A is a high-performance CMOS static RAM organized as 2048 words by 8 bits. Easy memory expansion is
provided by an active LOW Chip Enable CE , and active LOW Output Enable OE and three-state drivers. The CY7C128A has an automatic power-down feature, reducing the power consumption by 83% when deselected.

Writing to the device is accomplished when the Chip Enable CE and Write Enable WE inputs are both LOW.

Data on the eight I/O pins I/O0 through I/O7 is written into the memory location specified on the address pins A0 through A10 .

Reading the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while Write Enable WE remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the eight I/O pins.

The I/O pins remain in high-impedance state when Chip Enable CE or Output Enable OE is HIGH or Write Enable WE is LOW.

The CY7C128A utilizes a die coat to insure alpha immunity.

Logic Block Diagram

Pin Configurations

DIP/SOJ/SOIC Top View

A10 A9 A8 A7 A6 A5 A4

CE WE

ROW DECODER SENSE AMPS

INPUT BUFFER
128 x 16 x 8 ARRAY

COLUMN DECODER

POWER DOWN

I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7
24 VCC

A6 2 A5 3 A4 4
23 A8 22 A9 21 WE
20 OE

A2 A1
7 7C128A18

A10 CE

I/O0 9 I/O1 10 I/O2 11 GND 12
17 I/O7 16 I/O6 15 I/O5 14 I/O4
13 I/O3

LCC Top View

A5 A6 A7 VCC A8
3 2 1 24 23

A4 4 A3 5 A2 6
22 A9 21 WE 20 OE

A1 7 7C128A 19 A10
18 CE
Ordering Information

Speed ns 15 20
Ordering Code CY7C128A-15PC CY7C128A-15VC CY7C128A-15SC CY7C128A-20PC CY7C128A-20VC CY7C128A-20SC CY7C128A-20DMB CY7C128A-20LMB CY7C128A-25PC CY7C128A-25VC CY7C128A-25SC CY7C128A-25DMB CY7C128A-35PC CY7C128A-35VC CY7C128A-35SC CY7C128A-35DMB CY7C128A-45PC CY7C128A-45VC CY7C128A-45SC CY7C128A-45DMB CY7C128A-45LMB

Package Name P13 V13 S13 P13 V13 S13 D14 L53 P13 V13 S13 D14 P13 V13 S13 D14 P13 V13 S13 D14 L53

Package Type 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil CerDIP 24-Pin Rectangular Leadless Chip Carrier 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil CerDIP 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil CerDIP 24-Lead 300-Mil Molded DIP 24-Lead Molded SOJ 24-Lead 300-Mil Molded SOIC 24-Lead 300-Mil CerDIP 24-Pin Rectangular Leadless Chip Carrier

Operating Range

Commercial

Commercial

Military Commercial

Military Commercial

Military Commercial

Military

Page 6 of 10 [+] Feedback

MILITARY SPECIFICATIONS Group A Subgroup Testing

DC Characteristics

Parameter

VOH VOL VIH VIL Max. IIX IOZ ICC ISB

Subgroups 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3

Switching Characteristics

Parameter

READ CYCLE
tRC tAA tOHA tACE tDOE WRITE CYCLE
tWC tSCE tAW tHA tSA tPWE tSD tHD

Subgroups
7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11
7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11

CY7C128A

Page 7 of 10 [+] Feedback

Package Diagrams
24-Lead 300-Mil CerDIP D14

MIL-STD-1835 D- 9 Config.A

CY7C128A
24-Pin Rectangular Leadless Chip Carrier L53
51-80031
51-80066

Page 8 of 10 [+] Feedback

Package Diagrams continued
24-Lead 300-Mil Molded DIP P13/P13A

CY7C128A
24-Lead 300-Mil Molded SOJ V13
51-85013-A
51-85030-A

Page 9 of 10

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Datasheet ID: CY7C128A-35PC 507938