AT25DF641-MWH-T

AT25DF641-MWH-T Datasheet


64-Mbit, 2.7V Minimum Serial Peripheral Interface Serial Flash Memory Atmel AT25DF641

Part Datasheet
AT25DF641-MWH-T AT25DF641-MWH-T AT25DF641-MWH-T (pdf)
Related Parts Information
AT25DF641-MWH-Y AT25DF641-MWH-Y AT25DF641-MWH-Y
AT25DF641-S3H-B AT25DF641-S3H-B AT25DF641-S3H-B
AT25DF641-S3H-T AT25DF641-S3H-T AT25DF641-S3H-T
PDF Datasheet Preview
• Single 2.7V − 3.6V Supply
• Serial Peripheral Interface SPI Compatible

Supports SPI Modes 0 and 3 Supports Atmel Operation Supports Dual-Input Program and Dual-Output Read
• Very High Operating Frequencies 100MHz for RapidS 75MHz for SPI Clock-to-Output tV of 5ns Maximum
• Flexible, Optimized Erase Architecture for Code + Data Storage Applications Uniform 4-Kbyte Block Erase Uniform 32-Kbyte Block Erase Uniform 64-Kbyte Block Erase Full Chip Erase
• Individual Sector Protection with Global Protect/Unprotect Feature 128 Sectors of 64-Kbytes Each
• Hardware Controlled Locking of Protected Sectors via WP Pin
• Sector Lockdown Make Any Combination of 64-Kbyte Sectors Permanently Read-Only
• 128-Byte Programmable OTP Security Register
• Flexible Programming Byte/Page Program 1- to 256-Bytes
• Fast Program and Erase Times 1.0ms Typical Page Program 256-Bytes Time 50ms Typical 4-Kbyte Block Erase Time 250ms Typical 32-Kbyte Block Erase Time 400ms Typical 64-Kbyte Block Erase Time
• Program and Erase Suspend/Resume
• Automatic Checking and Reporting of Erase/Program Failures
• Software Controlled Reset
• JEDEC Standard Manufacturer and Device ID Read Methodology
• Low Power Dissipation 5mA Active Read Current Typical at 20MHz 5µA Deep Power-Down Current Typical
• Endurance 100,000 Program/Erase Cycles
• Data Retention 20 Years
• Complies with Full Industrial Temperature Range
• Industry Standard Green Pb/Halide-free/RoHS Compliant Package Options 16-Lead SOIC 300-mil wide 8-Contact Very Thin DFN 6 x 8mm
64-Mbit, 2.7V Minimum Serial Peripheral Interface Serial Flash Memory Atmel AT25DF641

The AT25DF641 is a serial interface Flash memory device designed for use in a wide variety of highvolume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the AT25DF641, with its erase granularity as small as 4-Kbytes, makes it ideal for data storage as well, eliminating the need for additional data storage EEPROM devices.

The physical sectoring and the erase block sizes of the AT25DF641 have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the physical sectors and erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own protected sectors, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density.

The AT25DF641 also offers a sophisticated method for protecting individual sectors against erroneous or malicious program and erase operations. By providing the ability to individually protect and unprotect sectors, a system can unprotect a specific sector to modify its contents while keeping the remaining sectors of the memory array securely protected. This is useful in applications where program code is patched or updated on a subroutine or module basis or in applications where data storage segments need to be modified without running the risk of errant modifications to the program code segments. In addition to individual sector protection capabilities, the AT25DF641 incorporates Global Protect and Global Unprotect features that allow the entire memory array to be either protected or unprotected all at once. This reduces overhead during the manufacturing process since sectors do not have to be unprotected one-by-one prior to initial programming.

To take code and data protection to the next level, the AT25DF641 incorporates a sector lockdown mechanism that allows any combination of individual 64-Kbyte sectors to be locked down and become permanently read-only. This addresses the need of certain secure applications that require portions of the Flash memory array to be permanently protected against malicious attempts at altering program code, data modules, security information, or encryption/decryption algorithms, keys, and routines. The device also contains a specialized OTP One-Time Programmable Security Register that can be used for purposes such as unique device serialization, system-level Electronic Serial Number ESN storage, locked key storage, etc.

Specifically designed for use in 3-volt systems, the AT25DF641 supports read, program, and erase operations with a supply voltage range of 2.7V to 3.6V. No separate voltage is required for programming and erasing.
2 Atmel AT25DF641

Atmel AT25DF641

Pin Descriptions and Pinouts

Table Pin Descriptions

Symbol Name and Function

CS SCK SI SIO

SO SOI

CHIP SELECT Asserting the CS pin selects the device. When the CS pin is deasserted, the device will be deselected and normally be placed in standby mode not Deep Power-Down mode , and the SO pin will be in a high-impedance state. When the device is deselected, data will not be accepted on the SI pin. A high-to-low transition on the CS pin is required to start an operation, and a lowto-high transition is required to end an operation. When ending an internally selftimed operation such as a program or erase cycle, the device will not enter the standby mode until the completion of the operation.

SERIAL CLOCK This pin is used to provide a clock to the device and is used to control the flow of data to and from the device. Command, address, and input data present on the SI pin is always latched in on the rising edge of SCK, while output data on the SO pin is always clocked out on the falling edge of SCK.

SERIAL INPUT SERIAL INPUT/OUTPUT The SI pin is used to shift data into the device. The SI pin is used for all data input including command and address sequences. Data on the SI pin is always latched in on the rising edge of SCK. With the Dual-Output Read Array command, the SI pin becomes an output pin SIO to allow two bits of data on the SO and SIO pins to be clocked out on every falling edge of SCK. To maintain consistency with SPI nomenclature, the SIO pin will be referenced as SI throughout the document with exception to sections dealing with the Dual-Output Read Array command in which it will be referenced as SIO. Data present on the SI pin will be ignored whenever the device is deselected CS is deasserted .

SERIAL OUTPUT SERIAL OUTPUT/INPUT The SO pin is used to shift data out from the device. Data on the SO pin is always clocked out on the falling edge of SCK.

With the Dual-Input Byte/Page Program command, the SO pin becomes an input pin SOI to allow two bits of data on the SOI and SI pins to be clocked in on every rising edge of SCK. To maintain consistency with SPI nomenclature, the SOI pin will be referenced as SO throughout the document with exception to sections dealing with the Dual-Input Byte/Page Program command in which it will be referenced as SOI.

The SO pin will be in a high-impedance state whenever the device is deselected

CS is deasserted .

WRITE PROTECT The WP pin controls the hardware locking feature of the
device. Please refer to “Protection Commands and Features” on page 21 for more
details on protection features and the WP pin.

The WP pin is internally pulled-high and may be left floating if hardware
controlled protection will not be used. However, it is recommended that the WP pin also be externally connected to VCC whenever possible.

Asserted State Low − −

Type Input/Output

Output/Input

Table

Pin Descriptions Continued

Symbol Name and Function

Asserted

State

Type

HOLD

HOLD The HOLD pin is used to temporarily pause serial communication without
deselecting or resetting the device. While the HOLD pin is asserted, transitions on the SCK pin and data on the SI pin will be ignored, and the SO pin will be in a highimpedance state.

The CS pin must be asserted, and the SCK pin must be in the low state in order for a Hold condition to start. A Hold condition pauses serial communication only and does not have an effect on internally self-timed operations such as a program or erase cycle. Please refer to “Hold” on page 45 for additional details on the Hold operation.

Input
Ordering Information
Ordering Code Detail

AT 2 5 D F 6 4 1 - S 3 H - B

Atmel Designator

Product Family

Device Density 64 = 64-megabit Interface 1 = Serial

Shipping Carrier Option B = Bulk tubes Y = Bulk trays T = Tape and reel

Device Grade H = Green, NiPdAu lead finish,

Industrial Temperature range -40°C to +85°C

Package Option S3 = 16-lead, wide SOIC MW= 8-contract, 6mm x 8mm VDFN

Green Package Options Pb/Halide-free/RoHS Compliant
Ordering Code

Package

Lead Finish

Voltage

Max. Freq. MHz

AT25DF641-S3H-B 16S

AT25DF641-S3H-T

NiPdAu 2.7V to 3.6V

AT25DF641-MWH-Y AT25DF641-MWH-T
8MW1

Note The shipping carrier option code is not marked on the devices

Operating Range

Industrial Temperature −40°C to 85°C
16S 8MW1

Package Type 16-lead, Wide, Plastic Gull Wing Small Outline Package SOIC 8-contact, 6 x 8mm, Very Thin Dual Flat No Lead Package VDFN
52 Atmel AT25DF641

Packaging Information
16S SOIC

Atmel AT25DF641

E End View

Top View C

Side View

Notes This drawing is for general information only refer to JEDEC Drawing MS-013, Variation AA for additional information.

Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusion and gate burrs shall not exceed mm per side.

Dimension E does not include inter-lead Flash or protrusion. Inter-lead flash and protrusions shall not exceed mm per side.

L is the length of the terminal for soldering to a substrate.

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL A A1 b D E H L e C

MIN NOM MAX

NOTE

Package Drawing Contact 16S, 16-lead, Wide Body, Plastic Gull Wing Small Outline Package SOIC
8MW1 VDFN

Pin 1 ID D

C Side View

Top View

Pin #1 ID

Bottom View
1 Pin #1

Option A Chamfer C

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL MIN NOM MAX NOTE
More datasheets: B39321R901U410 | ACC023 | FJAF6808DTU | FJAF6808DYDTU | 2N5246 | 2N5246_D74Z | 2N5246_J35Z | AT25DF641-MWH-Y | AT25DF641-S3H-B | AT25DF641-S3H-T


Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT25DF641-MWH-T Datasheet file may be downloaded here without warranties.

Datasheet ID: AT25DF641-MWH-T 518906