TH7301EDF

TH7301EDF Datasheet

TH7301

Part	Datasheet
TH7301EDF	TH7301EDF (pdf)

Related Parts	Information
TH7301EDF-TR	TH7301EDF-TR

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TH7301 Dual-Channel Programmable Low-Pass Filter The device incorporates two matching 4th-order Butterworth filters with voltage gain control to perform low-pass filtering on quadrature demodulated signals. The cutoff frequency and inband gain are programmable via a standard 3-wire interface. The cutoff frequency can be set between MHz and MHz and the inband voltage gain can be set between -3 dB and 20 dB. The cutoff frequency value is determined via a 10-bit control word, with smaller step sizes in the lower portion of the cutoff frequency range. The device contains an on-chip oscillator to adjust the cutoff frequency. Maintaining amplifiers configure the Butterworth filter as the phase shift component of the oscillator. The frequency of oscillation tracks the filter cutoff frequency. The cutoff frequency of the filter can be accurately set according to the resolution of the IC by measuring the frequency of oscillation. Features Applications Y Wide cutoff frequency range MHz to Y Dual-channel architecture produces superior matching and ease of use for quadrature signals Y Companding design provides higher resolution at lower cutoff frequencies Y Low power consumption <105 mA, typical 55 mA from -5 V supply Fc = 1 MHz 25°C Y Single ended or differential input operation possible AC coupled Y No external components for trimming necessary Y Small package 16-pin SOP Y Digital Broadcasting Systems DBS and Digital Video Broadcasting DVB Y Satellite and cable TV decoders Y Microwave point to point links Block Diagram 4th Order Butterworth Filter Fixed Gain 4th Order Butterworth Filter Fixed Gain Figure 1 Block Diagram TH7301 Dual-Channel Programmable Low-Pass Filter Theory of Operation The IC is divided into I and Q channel signal paths each consisting of an input stage, gyrator 4th order Butterworth low-pass filter, output stage and feedback amplifier for an oscillator. A serial interface is provided to allow the gain and cutoff frequency to be programmed via a standard 3 wire interface. The digital cutoff frequency setting is converted to a current by a digital-to-analog converter. Internal bandgap references and biasing blocks provide top level biasing on voltage and current references for the complete device. Input stage The device incorporates programmable attenuation in the input stages to maintain filter linearity and to provide overall gain control for the IC. The attenuation can be programmed in coarse steps of 3 dB with fine control of dB in the input transconductor of the gyrator filters. Internal multiplexers and back to back followers allow single-ended or differential input operation on both I and Q signal paths. 4th order Butterworth filter The filter architecture is based on a fully balanced continuous time gyrator technique with 4th order Butterworth response. Linear current programmable transconductance elements are used to synthesise the two inductors and source and termination impedance of the filter. A termination to source impedance ratio of 2:1 is selected to minimise output noise while maintaining a realisable range of capacitor values. The use of a differential architecture has three distinct advantages. Firstly the ultimate noise rejection is substantially better than that of the unbalanced LC filter. Secondly differential drive allows the use of a current programmable Gm stage with very much greater signal handling. And finally DC loading of the output is common mode and does not lead to differential DC offsets. This last point is especially important as the bias current within the filter can become very low at low cutoff frequencies. Output stage The output stage is designed to carry out differential to single ended conversion and provides the capability of driving up to 15 pF of capacitive load. Oscillator The maintaining and limiting amplifier is used as part of a phase shift oscillator circuit with the gyrator Butterworth filter as the phase shift element. The frequency of oscillation occurs at the -3 dB frequency of the filter as the phase shift through a 4th order Butterworth filter is 180 degrees at the -3 dB point. Voltage limiters are integrated into the gyrator filters and limit the differential voltage to 50 mVpp in order to ensure that the transconductance elements remain in their linear region of operation and hence the expected inductance values are synthesised. Serial interface The filter cutoff frequency and gain are programmed via a 3 wire serial interface bus. The interface consists of the serial data clock SCLK , serial data input SDATA and a serial enable SDEN . The filter is programmed by asserting SDEN and clocking the 8 bit serial data, MSB first, into the shift register. The two most significant bits represent the register address bits. The 6 LSB of data are loaded into the relevant register on the falling edge of SDEN. The serial interface consists of an 8 bit serial input to parallel output SIPO register, three 6-bit parallel load registers and register address decode logic. Once SDEN is asserted, data is clocked into the SIPO on the positive edge of SCLK. When the data is loaded, the two address bits are decoded to determine which register should be updated. The data is transfered to the register on the falling edge of SDEN. The serial interface does not contain a power on reset, thus all three registers must be programmed before reliable filter operation can be achieved. Ordering Information Quality Data Small Outline Package SOP 16 Wide Body WB Package type SOP WB 16 min max 10 ° Dimensions in inches, coplanarity < original dimension inch Package code DF16 Small Outline Package SOP 16 Wide Body WB Package type SOP WB 16 min max 10 ° Dimensions in millimeters, coplanarity < mm, original dimension inch Package code DF16 The TH7301 Programmable Low-Pass Filter IC is available in a 16 pin SOP WB package and for the Operating Temperature range of 0 °C...+70 °C Commercial . The order number is TH7301C C=Commercial . Quality data is available on request. Contact: Thesys Gesellschaft für Mikroelektronik mbH Quality Assurance Haarbergstr. 67, 99097 Erfurt, Germany Tel. +49-361-4276155, Fax +49-361-4276060 TH7301 Dual-Channel Programmable Low-Pass Filter TH7301 Dual-Channel Programmable Low-Pass Filter Thesys Headquarter & Joint Ventures E-Mail: Thesys Gesellschaft für Mikroelektronik mbH Haarbergstrasse 67 D-99097 Erfurt Germany Tel. +49 361 427 6000 Fax +49 361 427 6111 Thesys Sales Offices n Germany Haarbergstrasse 67 D-99097 Erfurt Germany Tel. +49 361 427 8141 Fax +49 361 427 6196 Am Seestern 8 D-40547 Düsseldorf Tel. +49 211 536 02-0 Fax +49 211 536 02-50 Karl-Hammerschmidt-Str. 45 D-85609 Aschheim-Dornach Tel. +49 89 99 35 58-0 Fax +49 89 99 35 58-66 Otto-Hahn-Strasse 15 D-65520 Bad Camberg Tel. +49 6434 50 41 Fax +49 6434 42 77 Thesys-Mikropribor ul. Polytechnitscheskaja 33 UA-252 056 Kiev Ukraine Tel. +38 044 241 70 31 Fax +38 044 241 70 32 Telex 131 489 ELVIA SU n United Kingdom 41 Pavenhill, Purton Wiltshire, SN5 9BZ UK Tel. +44 1793 772 474 Fax +44 1793 772 474 Thesys-Intechna ul. Plechanowskaja 8 RUS-394 089 Woronesh Russia Tel. +7 0732 55 36 97 Fax +7 0732 55 36 97 Telex 153 221 MAKVO SU Important Notice Devices sold by Thesys are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Thesys makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Thesys reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Thesys for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Thesys for each application. The information furnished by Thesys is believed to be correct and accurate. However, Thesys shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of Thesys rendering of technical or other services. 1997 Thesys Gesellschaft für Mikroelektronik mbH. All rights reserved. This data sheet is printed on environmentally friendly paper, bleached without chlorine.

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TH7301

Dual-Channel Programmable Low-Pass Filter

The device incorporates two matching 4th-order Butterworth filters with voltage gain control to perform low-pass filtering on quadrature demodulated signals. The cutoff frequency and inband gain are programmable via a standard 3-wire interface. The cutoff frequency can be set between MHz and MHz and the inband voltage gain can be set between -3 dB and 20 dB. The cutoff frequency value is determined via a 10-bit control word, with smaller step sizes in the lower
portion of the cutoff frequency range. The device contains an on-chip oscillator to adjust the cutoff frequency. Maintaining amplifiers configure the Butterworth filter as the phase shift component of the oscillator. The frequency of oscillation tracks the filter cutoff frequency. The cutoff frequency of the filter can be accurately set according to the resolution of the IC by measuring the frequency of oscillation.

Features Applications

Y Wide cutoff frequency range MHz to

Y Dual-channel architecture produces superior
matching and ease of use for quadrature signals

Y Companding design provides higher resolution at
lower cutoff frequencies

Y Low power consumption <105 mA, typical 55 mA
from -5 V supply Fc = 1 MHz 25°C

Y Single ended or differential input operation
possible AC coupled

Y No external components for trimming necessary Y Small package 16-pin SOP

Y Digital Broadcasting Systems DBS and

Digital Video Broadcasting DVB

Y Satellite and cable TV decoders Y Microwave point to point links

Block Diagram
4th Order Butterworth Filter

Fixed Gain
4th Order Butterworth Filter

Fixed Gain

Figure 1 Block Diagram

TH7301 Dual-Channel Programmable Low-Pass Filter

Theory of Operation

The IC is divided into I and Q channel signal paths each consisting of an input stage, gyrator 4th order Butterworth low-pass filter, output stage and feedback amplifier for an oscillator. A serial interface is provided to allow the gain and cutoff frequency to be programmed via a standard 3 wire interface. The digital cutoff frequency setting is converted to a current by a digital-to-analog converter. Internal bandgap references and biasing blocks provide top level biasing on voltage and current references for the complete device.

Input stage

The device incorporates programmable attenuation in the input stages to maintain filter linearity and to provide overall gain control for the IC. The attenuation can be programmed in coarse steps of 3 dB with fine control of dB in the input transconductor of the gyrator filters. Internal multiplexers and back to back followers allow single-ended or differential input operation on both I and Q signal paths.
4th order Butterworth filter

The filter architecture is based on a fully balanced continuous time gyrator technique with 4th order Butterworth response. Linear current programmable transconductance elements are used to synthesise the two inductors and source and termination impedance of the filter. A termination to source impedance ratio of 2:1 is selected to minimise output noise while maintaining a realisable range of capacitor values.

The use of a differential architecture has three distinct advantages. Firstly the ultimate noise rejection is substantially better than that of the unbalanced LC filter. Secondly differential drive allows the use of a current programmable Gm stage with very much greater signal handling. And finally DC loading of the output is common mode and does not lead to differential DC offsets. This last point is especially important as the bias current within the filter can become very low at low cutoff frequencies.

Output stage

The output stage is designed to carry out differential to single ended conversion and provides the capability of driving up to 15 pF of capacitive load.

Oscillator

The maintaining and limiting amplifier is used as part of a phase shift oscillator circuit with the gyrator Butterworth filter as the phase shift element. The frequency of oscillation occurs at the -3 dB frequency of the filter as the phase shift through a 4th order Butterworth filter is 180 degrees at the -3 dB point. Voltage limiters are integrated into the gyrator filters and limit the differential voltage to 50 mVpp in order to ensure that the transconductance elements remain in their linear region of operation and hence the expected inductance values are synthesised.

Serial interface

The filter cutoff frequency and gain are programmed via a 3 wire serial interface bus. The interface consists of the serial data clock SCLK , serial data input SDATA and a serial enable SDEN . The filter is programmed by asserting SDEN and clocking the 8 bit serial data, MSB first, into the shift register. The two most significant bits represent the register address bits. The 6 LSB of data are loaded into the relevant register on the falling edge of SDEN.

The serial interface consists of an 8 bit serial input to parallel output SIPO register, three 6-bit parallel load registers and register address decode logic.

Once SDEN is asserted, data is clocked into the SIPO on the positive edge of SCLK. When the data is loaded, the two address bits are decoded to determine which register should be updated. The data is transfered to the register on the falling edge of SDEN.

The serial interface does not contain a power on reset, thus all three registers must be programmed before reliable filter operation can be achieved.
Ordering Information

Quality Data

Small Outline Package SOP 16 Wide Body WB

Package type

SOP WB 16
min max
10 °

Dimensions in inches, coplanarity < original dimension inch

Package code

DF16

Small Outline Package SOP 16 Wide Body WB

Package type

SOP WB 16
min max
10 °

Dimensions in millimeters, coplanarity < mm, original dimension inch

Package code

DF16

The TH7301 Programmable Low-Pass Filter IC is available in a 16 pin SOP WB package and for the Operating Temperature range of 0 °C...+70 °C Commercial .

The order number is TH7301C C=Commercial .

Quality data is available on request. Contact:

Thesys Gesellschaft für Mikroelektronik mbH Quality Assurance Haarbergstr. 67, 99097 Erfurt, Germany Tel. +49-361-4276155, Fax +49-361-4276060

TH7301 Dual-Channel Programmable Low-Pass Filter

TH7301 Dual-Channel Programmable Low-Pass Filter

Thesys Headquarter & Joint Ventures

E-Mail:

Thesys Gesellschaft für Mikroelektronik mbH Haarbergstrasse 67 D-99097 Erfurt Germany Tel. +49 361 427 6000 Fax +49 361 427 6111

Thesys Sales Offices
n Germany

Haarbergstrasse 67 D-99097 Erfurt Germany Tel. +49 361 427 8141 Fax +49 361 427 6196

Am Seestern 8 D-40547 Düsseldorf Tel. +49 211 536 02-0 Fax +49 211 536 02-50

Karl-Hammerschmidt-Str. 45 D-85609 Aschheim-Dornach Tel. +49 89 99 35 58-0 Fax +49 89 99 35 58-66

Otto-Hahn-Strasse 15 D-65520 Bad Camberg Tel. +49 6434 50 41 Fax +49 6434 42 77

Thesys-Mikropribor ul. Polytechnitscheskaja 33 UA-252 056 Kiev Ukraine Tel. +38 044 241 70 31 Fax +38 044 241 70 32 Telex 131 489 ELVIA SU
n United Kingdom
41 Pavenhill, Purton Wiltshire, SN5 9BZ UK Tel. +44 1793 772 474 Fax +44 1793 772 474

Thesys-Intechna ul. Plechanowskaja 8 RUS-394 089 Woronesh Russia Tel. +7 0732 55 36 97 Fax +7 0732 55 36 97 Telex 153 221 MAKVO SU

Important Notice

Devices sold by Thesys are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Thesys makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Thesys reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Thesys for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Thesys for each application. The information furnished by Thesys is believed to be correct and accurate. However, Thesys shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of Thesys rendering of technical or other services. 1997 Thesys Gesellschaft für Mikroelektronik mbH. All rights reserved.

This data sheet is printed on environmentally friendly paper,
bleached without chlorine.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived TH7301EDF Datasheet file may be downloaded here without warranties.

Datasheet ID: TH7301EDF 647817