µMAX is a registered trademark of Maxim Integrated Products, Inc.
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MAX9587EVKIT+ (pdf) |
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MAX9587AZT+ |
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Single, Dual, Triple, and Quad Standard-Definition Video Filter Amplifiers with AC-Coupled Input Buffers The are small, low-power, multichannel video amplifiers with integrated reconstruction filters and input clamps. Specially suited for standarddefinition video signals, these devices are ideal for a wide range of television and set-top box applications. The video signals from the outputs of a digital-to-analog converter DAC are AC-coupled to the inputs of the External video signals, in which the DC bias is usually not known, can also be AC-coupled to the inputs of the input sync-tip clamps set the DC level of composite video or luma signals, and the input bias circuits set the DC level of chroma signals. The reconstruction filter typically has ±1dB passband flatness at 8.5MHz and 55dB attenuation at 27MHz. The amplifiers have 2V/V gain and the outputs can be DCcoupled to a 75Ω load, which is the equivalent of two video loads, or AC-coupled to a 150Ω load. The operate from a 2.7V to 3.6V single supply and are specified over the -40°C to +125°C automotive temperature range. The are offered in small SOT23 and packages. Set-Top Boxes Televisions µMAX is a registered trademark of Maxim Integrated Products, Inc. o Single- MAX9586 , Dual- MAX9587 , Triple- MAX9588 , and Quad- MAX9589 Channel Devices o 8.5MHz, ±1dB Passband o 55dB Attenuation at 27MHz o Fixed Gain of 2V/V o Low Power 4.25mA per Channel o 2.7V to 3.6V Single-Supply Operation o Small SOT23 and µMAX Packages Ordering Information PART PIN-PACKAGE CHANNELS MAX9586AZK+T 5 Thin SOT23 MAX9587AZT+T 6 Thin SOT23 MAX9588AUA+T 8 µMAX MAX9589AUB+T 10 µMAX Note All devices are specified over the -40°C to +125°C operating temperature range. +Denotes a lead Pb -free/RoHS-compliant package. T = Tape and reel. Pin Configurations and Selector Guide located at end of data sheet. Block Diagrams UNKNOWN BIAS INA CLAMP MAX9588 AV = 2V/V 300mV OUTA INB CLAMP OUTB AV = 2V/V INC BIAS Block Diagrams continued at end of data sheet. OUTC AV = 2V/V Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at Single, Dual, Triple, and Quad Standard-Definition Video Filter Amplifiers with AC-Coupled Input Buffers ABSOLUTE MAXIMUM RATINGS VDD to GND to +4V IN_ to GND to +4V SHDN to +4V OUT_ Short Circuit Duration to VDD, GND .................Continuous Input Current IN_, SHDN Continuous Power Dissipation TA = +70°C 5-Pin Thin SOT23 derate 9.1mW/°C above +70°C ....727mW 6-Pin Thin SOT23 derate 9.1mW/°C above +70°C ....727mW 8-Pin µMAX derate 4.5mW/°C above +70°C .............362mW 10-Pin µMAX derate 5.6mW/°C above +70°C ...........444mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature Storage Temperature Range .............................-65°C to +150°C Lead Temperature soldering, 10s .................................+300°C Soldering Temperature reflow Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS VDD = 3.3V, VGND = 0V, VRL = no load, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. Note 1 PARAMETER CONDITIONS TYP MAX UNITS Supply Voltage Range Supply Current Sync-Tip Clamp Level Input Voltage Range VDD IDD VCLP Guaranteed by PSRR Per channel Sync-tip clamp VDD = 2.7V, sync-tip clamp input Guaranteed by DC VDD = 2.7V, bias input voltage gain VDD = 3V, sync-tip clamp input VP-P VDD = 3V, bias input Sync Crush Sync-tip clamp, percentage reduction in sync pulse 0.3VP-P , guaranteed by input clamping current measurement, measured at input Input Clamping Current Maximum Input Source Resistance Sync-tip clamp Bias Voltage Input Resistance VBIAS Bias circuit Bias circuit VDD = 2.7V, VIN = VCLP to VCLP + 1.05V VDD = 3V, VIN = VCLP to VCLP + 1.2V DC Voltage Gain Note 2 RL = 150Ω to GND VDD = 2.7V, VIN = VBIAS ±0.525V DC Gain Matching Output Level |
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