MAX24288 IEEE 1588 Packet Timestamper and Clock and 1Gbps Parallel-to-Serial MII Converter
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MAX24288EVKIT (pdf) |
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MAX24288ETK+T |
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MAX24288 IEEE 1588 Packet Timestamper and Clock and 1Gbps Parallel-to-Serial MII Converter Highlighted Features The MAX24288 is a flexible, low-cost IEEE 1588 clock and timestamper with an SGMII or 1000BASE-X serial interface and a parallel MII interface that can be configured for GMII, RGMII, or 10/100 MII. The device provides all required hardware support for high-accuracy time and frequency synchronization using the IEEE1588 Precision Time Protocol. In both the transmit and receive directions 1588 packets are identified and timestamped with high precision. System software makes use of these timestamps to determine the time offset between the system and its timing master. Software can then correct any time error by steering the device’s 1588 clock subsystem appropriately. The device provides the necessary I/O to time-synchronize with a 1588 master elsewhere in the same system or to be the master to which slave components can synchronize. 1588-Enabled Equipment with 1G Ethernet Ports Wireless Base Stations and Controllers Switches, Routers, DSLAMs, PON Equipment Pseudowire Circuit Emulation Equipment Test and Measurement Systems Industrial and Factory Automation Equipment Medical Equipment Complete Hardware Support for IEEE 1588 Ordinary, Boundary, and Transparent Clocks Flexible Block for Any 1588 Architecture 1588 Clock Hardware Steerable by Software with 2-8ns Time Resolution and 2-32ns Period Resolution 1ns Input Timestamp Accuracy and Output Edge Placement Accuracy Three Time/Frequency Controls Direct Time Write, Time Adjustment, and High-Resolution Frequency Adjustment Programmable Clock and Time-Alignment I/O Input Event Timestamper Detects Incoming Time Alignment e.g., 1 PPS or Clock Edges Output Event Generator Provides Output Clock Signal or Time Alignment Signal Built-In Support for Telecom Equipment Timing Architecture with Dual Redundant Timing Cards 1588 Timestamping Hardware 1588 v1 and v2 Packets, Transmit and Receive Packet Classifier Supports 1588 Over Ethernet, IPv4/UDP, IPv6/UDP, or MPLS and Is Programmable for More Complex Stacks Supports 802.1Q VLAN Tags and MAC-in-MAC One-Step Operation On-the-Fly Timestamp Insertion or Transparent Clock Corrections No Need for Follow-Up Packets Can Insert All Timestamps, Receive and Transmit, Into Packets for Easy Software Access Optional Two-Step Operation PART Ordering Information TEMP RANGE PIN-PACKAGE MAX24288ETK+ -40°C to +85°C 68 TQFN-EP* +Denotes a lead Pb -free/RoHS-compliant package. *EP = Exposed pad. SPI is a trademark of Motorola, Inc. Parallel-to-Serial MII Conversion Bidirectional Wire-Speed Interface Conversion Serial 1000BASE-X or SGMII v1.8 4, 6, or 8 Pin Parallel GMII, RGMII, or 10/100 MII Translates Link Speed and Duplex Mode Negotiation Between MDIO and SGMII PCS Full Support for 1588 + Synchronous Ethernet MDIO and SPI Interfaces 1.2V Operation with 3.3V I/O Maxim Integrated Products 1 ABRIDGED DATA SHEET Application Examples Example 1 Single-Port 1588 Slave Node Ethernet over fiber Ethernet over copper SFP Module -OR- 1000BASE-T PHY 1.25G Serial -OR- SGMII Local OSC GMII MAX24288 MDIO Processor 1588 Software 1588 recovered clock, e.g. 25MHz 1588 recovered time, e.g. 1 PPS to frequency-syntonized or time-synchronized system components MAX24288 Example 2 Multiport System with Switch-Connected 1588 Slave Node Ethernet over fiber SFP Modules or 1000BASE-T PHYs 1.25G Serial SGMII GbE Switch IC to other PHYs Local OSC GMII MAX24288 MDIO Processor 1588 Software 1588 recovered clock, e.g. 25MHz 1588 recovered time, e.g. 1 PPS to frequency-syntonized or time-synchronized system components Example 3 Multiport System, Boundary or Transparent Clock, Port Card Logic Ethernet over fiber Ethernet over copper SFP Module -OR- |
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