N80960SB10

N80960SB10 Datasheet

Part	Datasheet
N80960SB10	N80960SB10 (pdf)

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80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture • Built-in Interrupt Controller 16 MIPS* Burst Execution at 16 MHz 4 Direct Interrupt Pins 5 MIPS Sustained Execution at 16 MHz 31 Priority Levels, 256 Vectors • 512-Byte On-Chip Instruction Cache Direct Mapped Parallel Load/Decode for Uncached Instructions • Multiple Register Sets Sixteen Global 32-Bit Registers Sixteen Local 32-Bit Registers Four Local Register Sets Stored On-Chip Register Scoreboarding • Built-In Floating Point Unit Fully IEEE 754 Compatible • Easy to Use, High Bandwidth 16-Bit Bus Mbytes/s Burst Up to 16 Bytes Transferred per Burst • 32-Bit Address Space, 4 Gigabytes • 80-Lead Quad Flat Pack EIAJ QFP 84-Lead Plastic Leaded Chip Carrier PLCC • Pin Compatible with 80960SA • Software Compatible with 80960KA/KB/CA/CF Processors The 80960SB is a member of Intel’s 32-bit processor family, which is designed especially for low cost embedded applications. It includes a 512-byte instruction cache, an integrated floating-point unit and a built-in interrupt controller. The 80960SB has a large register set, multiple parallel execution units and a 16-bit burst bus. Using advanced RISC technology, this high performance processor is capable of execution rates in excess of 5 million instructions per second. The 80960SB is well-suited for a wide range of cost sensitive embedded applications including non-impact printers, network adapters and I/O controllers. FOUR 80-BIT FP REGISTERS 80-BIT FPU SIXTEEN 32-BIT GLOBAL REGISTERS 64- BY 32-BIT LOCAL REGISTER CACHE 32-BIT INSTRUCTION EXECUTION UNIT INSTRUCTION FETCH UNIT 512-BYTE INSTRUCTION CACHE INSTRUCTION DECODER MICROINSTRUCTION SEQUENCER MICROINSTRUCTION 32-BIT BUS CONTROL LOGIC 32-BIT ADDRESS 16-BIT BURST Figure The 80960SB Processor’s Highly Parallel Architecture Relative to Digital Equipment Corporation’s VAX-11/780 at 1 MIPS VAX-11 is a trademark of Digital Equipment Corporation Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent licenses are implied. Information contained herein supersedes previously published specifications on these devices from Intel. INTEL CORPORATION, 2004 August 2004 Order Number 272207-003 80960SB EMBEDDED 32-BIT MICROPROCESSOR

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80960SB

EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS
• High-Performance Embedded Architecture
• Built-in Interrupt Controller
16 MIPS* Burst Execution at 16 MHz
4 Direct Interrupt Pins
5 MIPS Sustained Execution at 16 MHz 31 Priority Levels, 256 Vectors
• 512-Byte On-Chip Instruction Cache Direct Mapped Parallel Load/Decode for Uncached Instructions
• Multiple Register Sets Sixteen Global 32-Bit Registers Sixteen Local 32-Bit Registers Four Local Register Sets Stored On-Chip Register Scoreboarding
• Built-In Floating Point Unit Fully IEEE 754 Compatible
• Easy to Use, High Bandwidth 16-Bit Bus Mbytes/s Burst Up to 16 Bytes Transferred per Burst
• 32-Bit Address Space, 4 Gigabytes
• 80-Lead Quad Flat Pack EIAJ QFP 84-Lead Plastic Leaded Chip Carrier PLCC
• Pin Compatible with 80960SA
• Software Compatible with 80960KA/KB/CA/CF Processors

The 80960SB is a member of Intel’s 32-bit processor family, which is designed especially for low cost embedded applications. It includes a 512-byte instruction cache, an integrated floating-point unit and a built-in
interrupt controller. The 80960SB has a large register set, multiple parallel execution units and a 16-bit burst bus. Using advanced RISC technology, this high performance processor is capable of execution rates in excess of 5 million instructions per second*. The 80960SB is well-suited for a wide range of cost sensitive embedded applications including non-impact printers, network adapters and I/O controllers.

FOUR 80-BIT FP REGISTERS
80-BIT FPU

SIXTEEN 32-BIT GLOBAL

REGISTERS
64- BY 32-BIT LOCAL

REGISTER CACHE
32-BIT INSTRUCTION EXECUTION

UNIT

INSTRUCTION FETCH UNIT
512-BYTE INSTRUCTION

CACHE

INSTRUCTION DECODER

MICROINSTRUCTION SEQUENCER

MICROINSTRUCTION
32-BIT BUS CONTROL LOGIC
32-BIT ADDRESS
16-BIT BURST

Figure The 80960SB Processor’s Highly Parallel Architecture
* Relative to Digital Equipment Corporation’s VAX-11/780 at 1 MIPS VAX-11 is a trademark of Digital Equipment Corporation

Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent
licenses are implied. Information contained herein supersedes previously published specifications on these devices from Intel.

INTEL CORPORATION, 2004

August 2004

Order Number 272207-003
80960SB EMBEDDED 32-BIT MICROPROCESSOR

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Datasheet ID: N80960SB10 638928