CV193DPAG
CV193DPAG Datasheet
IDTCV193 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
| Part | Datasheet |
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CV193DPAG |
CV193DPAG (pdf) |
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| IDTCV193 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR COMMERCIAL TEMPERATURE RANGE PROGRAMMABLE FLEXPC LP/S CLOCK FOR INTEL BASED SYSTEMS IDTCV193 ADVANCE INFORMATION FEATURES: • Compliant with Intel CK505 Gen II spec • One high precision PLL for CPU, SSC and N programming • One high precision PLL for SRC, SSC and N programming • One high precision PLL for SATA/PCI, and SSC • One high precision PLL for 96MHz/48MHz • Push-pull IOs for differential outputs • Support spread spectrum modulation, down spread and others • Support SMBus block read/write, byte read/write • Available in TSSOP package KEY FEATURES • Direct CPU and SRC clock frequency the Hex number into Byte [16:18], 1MHz stepping. • Linear and smooth transition for the CPU and SRC frequency programming. • SATA PLL source hardware select latch pin, PLL2 or PLL4. • Internal serial resistor hardware enable latch pin. • WOL 25MHz support. OUTPUTS: • 2 - 0.7V differential CPU CLK pair • 10 - 0.7V differential SRC CLK pair • 1 - CPU_ITP/SRC differential clock pair • 1 - SRC0/DOT96 differential clock pair • 6 - PCI, 33.3MHz • 1 - 48MHz • 1 - REF • 1 - SATA KEY SPECIFICATIONS: • CPU/SRC CLK cycle to cycle jitter < 85ps • PCI CLK cycle to cycle jitter < 500ps • All SRC, SRC[0:11] phase noise < 3.10s RMS, PCIE Gen II phase noise requirement. • SRC3, 4, 6, 7, designated PCIE Gen II outputs, nominal interpair skew = 0 ps FUNCTIONAL BLOCK DIAGRAM XTAL_IN XTAL_OUT SDATA SCLK XTAL Osc Amp SM Bus Controller CKPWRGD/PD# CPU_STOP# PCI_STOP# SRC5_EN ITP_EN CR_[H:A]# FSC,B,A SATA_SEL SR_ENABLE Control Logic PLL1 SSC N Programmable PLL3 SSC PLL4 SSC N Programmable Fixed PLL PLL2 CPU Output Buffer Stop Logic PCI/SATA SRC CLK Output Buffer Stop Logic SRC CLK Output Buffer Stop Logic 48MHz/96MHz Output BUffer REF CPU[1:0] CPU_ITP/SRC8 SRC1/25MHz/24.576MHz PCI[4:0], PCIF5 SATA/SRC2 SRC[7:3], [11:9] 48MHz DOT96/SRC0 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE ORDERING INFORMATION IDTCV XXXX Blank Commercial Temperature Range 0°C to +70°C Designation for tape and reel packaging PVG Shrink Small Outline Package - Green PAG Thin Shrink Small Outline Package - Green 193 Programmable FlexPC Clock for P4 Processor IDT CONFIDENTIAL IDTCV193 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR COMMERCIAL TEMPERATURE RANGE August 15, 2007 August 21, 2007 December 07, 2007 April 08, 2008 April 24, 2008 June 24, 2008 October 20, 2008 April 8, 2009 Initial Release. Updated Pinout/Pin Description pages Added Sata_Sel Table page Updated SMBus pages Updated Byte 18 pg. Updated VDDxxx_IO supply voltage pg. Fixed Ordering Information pg. Added tape and reel ordering information page 20 Corrected typo on pins 55 and 56 pin description page 4 Updated Byte 1 page Updated Input/Supply Common Output Parameters table. CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775 for Tech Support: IDT CONFIDENTIAL |
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