IDT70P27L12PFG
IDT70P27L12PFG Datasheet
IDT70P27L
| Part | Datasheet |
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IDT70P27L12PFG |
IDT70P27L12PFG (pdf) |
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| HIGH-SPEED 1.8V 32K x 16 ASYNCHRONOUS DUAL-PORT STATIC RAM IDT70P27L Features: True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed access Commercial 12/15ns max. Industrial 15ns max. Low-power operation IDT70P27L Active 306mW typ. Standby 360µW typ. Separate upper-byte and lower-byte control for bus matching capability Dual chip enables allow for depth expansion without external logic IDT70P27 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device M/S = VIH for BUSY output flag on Master, M/S = VIL for BUSY input on Slave Busy and Interrupt Flags On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port LVTTL-compatible, single 1.8V 1.7V < VDD < 1.95V power supply Available in 100-pin Thin Quad Flatpack TQFP Industrial temperature range -40°C to +85°C is available for selected speeds Green parts available, see ordering information Functional Block Diagram R/WL UBL R/WR UBR CE0L CE1L CE0R CE1R OEL LBL OER LBR I/O8-15L I/O0-7L BUSYL 1,2 I/O Control I/O Control A14L A0L Address Decoder A14L A0L CE0L CE1L OEL R/WL 32Kx16 MEMORY ARRAY 70P27 ARBITRATION INTERRUPT SEMAPHORE LOGIC SEM L M/S 2 1 BUSY is an input as a Slave M/S=VIL and an output as a Master M/S=VIH . 2 BUSY and INT are non-tri-state totem-pole outputs push-pull . 2009 Integrated Device Technology, Inc. Address Decoder A14R A0R CE0R CE1R OER R/WR I/O8-15R I/O0-7R BUSYR 1,2 A14R A0R SEMR INTR 2 5694 drw 01 JANUARY 2009 DSC 5694/2 IDT 70P27L High-Speed 1.8V 32K x 16 Asynchronous Dual-Port Static RAM Description: Commercial and Industrial Temperature Range The IDT70P27 is a high-speed 32K x 16 Dual-Port Static RAM, reads or writes to any location in memory. An automatic power down designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a feature controlled by the chip enables CE0 andCE1 permits the on-chip combination MASTER/SLAVE Dual-Port RAM for 32-bit and wider word circuitry of each port to enter a very low standby power mode. systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32- Fabricated using IDT’s CMOS high-performance technology, Ordering Information Device Type A Power 999 Speed A Package Process/ Temperature Range Commercial and Industrial Temperature Range Blank Commercial 0°C to +70°C Industrial -40°C to +85°C Green 100-pin TQFP PN100-1 12 15 Commercial Only Commercial & Industrial Speed in nanoseconds Low Power 70P27 512K 32K x 16 1.8V Dual-Port RAM 5694 drw 19 NOTES Industrial temperature range is available on selected TQFP packages in low power. For other speeds, packages and powers contact your sales office. Green parts available. For specific speeds, packages and powers contact your local sales office. Datasheet Document History 04/02/08 01/19/09: Initial Release Page 19 Removed "IDT" from orderable part number CORPORATE HEADQUARTERS for SALES: for Tech Support: 6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 408-284-2794 San Jose, CA 95138 fax 408-284-2775 The IDT logo is a registered trademark of Integrated Device Technology, Inc. |
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