932S421CFLF

932S421CFLF Datasheet

ICS932S421C

Part	Datasheet
932S421CFLF	932S421CFLF (pdf)

Related Parts	Information
932S421CGLF	932S421CGLF
932S421CGLFT	932S421CGLFT
932S421CFLFT	932S421CFLFT

PDF Datasheet Preview
Integrated Circuit Systems, Inc. ICS932S421C PCIe Gen 2 and QPI Clock for Intel-based Servers Recommended Application PCIe Gen 2 & QPI compliant CK410B+ clock for Intel-based servers Output Features • 4 - 0.7V current-mode differential CPU pairs • 5 - 0.7V current-mode differential SRC pair • 4 - PCI 33MHz • 3 - PCICLK_F, 33MHz free-running • 1 - 48MHz • 2 - REF, 14.318MHz Features/Benefits • Supports spread spectrum modulation, 0 to down spread • Uses external 14.318MHz crystal and external load capacitors for low ppm synthesis error • CPU clocks independent of SRC/PCI clocks • D2/D3 SMBus address • Increased CPU amplitude at higher speeds compared to 932S421B Key Specifications • PCIe Gen 2 compliant SRC outputs • QPI & FBD 2 compliant CPU clocks • CPU cycle-cycle jitter < 50ps • SRC cycle-cycle jitter < 125ps • PCI cycle-cycle jitter < 500ps • CPU output skew < 50ps • SRC output skew < 250ps • ± 100ppm frequency accuracy on all outputs Functionality FS_C1 FS_B1 FS_A2 CPU MHz SRC MHz 1 Reserved PCI MHz REF MHz USB MHz FS_B and FS_C are three-level inputs. Please see VIL_FS and VIH_FS specifications in the Input/Supply/Common Output Parameters Table for correct values. Also refer to the Test Clarification Table. FS_A is a low-threshold input. Please see the VIL_FS and VIH_FS specifications in the Input/Supply/Common Output Parameters Table for correct values. Pin Configuration VDDPCI 1 GNDPCI 2 PCICLK0 3 PCICLK1 4 PCICLK2 5 PCICLK3 6 GNDPCI 7 VDDPCI 8 PCICLK_F0 9 PCICLK_F1 10 PCICLK_F2 11 VDD48 12 48MHz 13 GND48 14 VDDSRC 15 SRCCLKT0 16 SRCCLKC0 17 SRCCLKC1 18 SRCCLKT1 19 GNDSRC 20 SRCCLKT2 21 SRCCLKC2 22 SRCCLKC3 23 SRCCLKT3 24 VDDSRC 25 SRCCLKT4 26 SRCCLKC4 27 VDDSRC 28 ICS932S421 56 FS_C/TEST_SEL 55 REF0 54 REF1 53 VDDREF 52 X1 51 X2 50 GNDREF 49 FS_B/TEST_MODE 48 FS_A 47 VDDCPU 46 CPUCLKT0 45 CPUCLKC0 44 VDDCPU 43 CPUCLKT1 42 CPUCLKC1 41 GNDCPU 40 CPUCLKT2 39 CPUCLKC2 38 VDDCPU 37 CPUCLKT3 36 CPUCLKC3 35 VDDA 34 GNDA 33 IREF 32 NC 31 Vtt_PwrGd#/PD 30 SDATA 29 SCLK 56-pin SSOP & TSSOP Integrated Circuit Systems, Inc. Pin Description Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 PIN NAME VDDPCI GNDPCI PCICLK0 PCICLK1 PCICLK2 PCICLK3 GNDPCI VDDPCI PCICLK_F0 PCICLK_F1 PCICLK_F2 VDD48 48MHz GND48 VDDSRC SRCCLKT0 SRCCLKC0 SRCCLKC1 SRCCLKT1 GNDSRC SRCCLKT2 SRCCLKC2 SRCCLKC3 SRCCLKT3 VDDSRC SRCCLKT4 SRCCLKC4 VDDSRC ICS932S421C PIN TYPE PWR Power supply for PCI clocks, nominal 3.3V PWR Ground pin for the PCI outputs OUT PCI clock output. OUT PCI clock output. OUT PCI clock output. OUT PCI clock output. PWR Ground pin for the PCI outputs PWR Power supply for PCI clocks, nominal 3.3V Ordering Information Part / Order Number 932S421CFLF 932S421CFLFT 932S421CGLF 932S421CGLFT Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Package 56-pin SSOP 56-pin SSOP 56-pin TSSOP 56-pin TSSOP Temperature 0 to +70° C 0 to +70° C 0 to +70° C 0 to +70° C “LF” after the package code denotes Pb-Free configuration, RoHS compliant. Integrated Circuit Systems, Inc. ICS932S421C Page # - Various 9 15 Various

PDF Datasheet Preview

Integrated Circuit Systems, Inc.

ICS932S421C

PCIe Gen 2 and QPI Clock for Intel-based Servers

Recommended Application PCIe Gen 2 & QPI compliant CK410B+ clock for Intel-based servers

Output Features
• 4 - 0.7V current-mode differential CPU pairs
• 5 - 0.7V current-mode differential SRC pair
• 4 - PCI 33MHz
• 3 - PCICLK_F, 33MHz free-running
• 1 - 48MHz
• 2 - REF, 14.318MHz

Features/Benefits
• Supports spread spectrum modulation, 0 to
down spread
• Uses external 14.318MHz crystal and external load capacitors for low ppm synthesis error
• CPU clocks independent of SRC/PCI clocks
• D2/D3 SMBus address
• Increased CPU amplitude at higher speeds compared
to 932S421B

Key Specifications
• PCIe Gen 2 compliant SRC outputs
• QPI & FBD 2 compliant CPU clocks
• CPU cycle-cycle jitter < 50ps
• SRC cycle-cycle jitter < 125ps
• PCI cycle-cycle jitter < 500ps
• CPU output skew < 50ps
• SRC output skew < 250ps
• ± 100ppm frequency accuracy on all outputs

Functionality

FS_C1 FS_B1

FS_A2

CPU MHz

SRC MHz
1 Reserved

PCI MHz

REF MHz

USB MHz

FS_B and FS_C are three-level inputs. Please see VIL_FS and VIH_FS specifications in the Input/Supply/Common Output Parameters Table for correct values. Also refer to the Test Clarification Table. FS_A is a low-threshold input. Please see the VIL_FS and VIH_FS specifications in the Input/Supply/Common Output Parameters Table for correct values.

Pin Configuration

VDDPCI 1 GNDPCI 2 PCICLK0 3 PCICLK1 4 PCICLK2 5 PCICLK3 6 GNDPCI 7 VDDPCI 8 PCICLK_F0 9 PCICLK_F1 10 PCICLK_F2 11

VDD48 12 48MHz 13 GND48 14 VDDSRC 15 SRCCLKT0 16 SRCCLKC0 17 SRCCLKC1 18 SRCCLKT1 19 GNDSRC 20 SRCCLKT2 21 SRCCLKC2 22 SRCCLKC3 23 SRCCLKT3 24 VDDSRC 25 SRCCLKT4 26 SRCCLKC4 27 VDDSRC 28

ICS932S421
56 FS_C/TEST_SEL 55 REF0 54 REF1 53 VDDREF 52 X1 51 X2 50 GNDREF 49 FS_B/TEST_MODE 48 FS_A 47 VDDCPU 46 CPUCLKT0 45 CPUCLKC0 44 VDDCPU 43 CPUCLKT1 42 CPUCLKC1 41 GNDCPU 40 CPUCLKT2 39 CPUCLKC2 38 VDDCPU 37 CPUCLKT3 36 CPUCLKC3 35 VDDA 34 GNDA 33 IREF 32 NC 31 Vtt_PwrGd#/PD 30 SDATA 29 SCLK
56-pin SSOP & TSSOP

Integrated Circuit Systems, Inc.

Pin Description

Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

PIN NAME VDDPCI GNDPCI PCICLK0 PCICLK1 PCICLK2 PCICLK3 GNDPCI VDDPCI PCICLK_F0 PCICLK_F1 PCICLK_F2 VDD48 48MHz GND48 VDDSRC SRCCLKT0 SRCCLKC0 SRCCLKC1 SRCCLKT1 GNDSRC SRCCLKT2 SRCCLKC2 SRCCLKC3 SRCCLKT3 VDDSRC SRCCLKT4 SRCCLKC4 VDDSRC

ICS932S421C

PIN TYPE

PWR Power supply for PCI clocks, nominal 3.3V

PWR Ground pin for the PCI outputs

OUT PCI clock output.

OUT PCI clock output.

OUT PCI clock output.

OUT PCI clock output.

PWR Ground pin for the PCI outputs

PWR Power supply for PCI clocks, nominal 3.3V
Ordering Information

Part / Order Number 932S421CFLF 932S421CFLFT 932S421CGLF 932S421CGLFT

Shipping Packaging Tubes

Tape and Reel Tubes

Tape and Reel

Package 56-pin SSOP 56-pin SSOP 56-pin TSSOP 56-pin TSSOP

Temperature 0 to +70° C 0 to +70° C 0 to +70° C 0 to +70° C
“LF” after the package code denotes Pb-Free configuration, RoHS compliant.

Integrated Circuit Systems, Inc.
ICS932S421C

Page # -

Various 9 15

Various

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Datasheet ID: 932S421CFLF 637216