89HP0504PBZBNRG

89HP0504PBZBNRG Datasheet

89HP0504PB Data Sheet

Part	Datasheet
89HP0504PBZBNRG	89HP0504PBZBNRG (pdf)

Related Parts	Information
89HP0504PZBNRG	89HP0504PZBNRG
89HP0504PZBABG	89HP0504PZBABG

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4 Channel 5Gbps Signal Repeater 89HP0504PB Data Sheet Device Overview The IDT 89HP0504PB P0504PB is a 5Gbps Repeater device featuring IDT EyeBoost technology that compensates for cable and board trace attenuations and ISI jitter, thereby extending connection reach. The device is optimized for PCIe Gen1 and Gen2 high speed serial data streams and contains four data channels, each able to process 5Gbps transmission rates. Each channel consists of an input equalizer and amplifier, signal detection with glitch filter, as well as programmable output swing and de-emphasis. Allowing for application specific optimization, the P0504PB, with its configurable receiver and transmitter features, is ideal for PCIe applications using a wide combination of cables and board trace materials. All modes of active data transfer are designed with minimized power consumption. In full shutdown mode, the part consumes less than 40mW in worst case environmental conditions. Blade servers, rack servers PCIe instrumentation Storage systems Cabled PCIe devices Compensates for cable and PCB trace attenuation and ISI jitter Programmable receiver equalization up to 24db Programmable transmitter swing and de-emphasis Recovers data stream even when the differential signal eye is completely closed due to trace attenuation and ISI jitter Full PCIe protocol support Configurable via external pins Leading edge power minimization in active and shutdown modes No external bias resistors or reference clocks required Channel mux mode, demux mode, 1 to 2 channels multicast, and Z-switch function mode Available in a 36-pin QFN package x 7.5mm with 0.5mm pitch Extends maximum cable length to over 8 meters and trace length over 48 inches in PCIe applications Minimizes BER Server Backplane Server Chipset PCIe gen1,2 Trace, eg. FR4 Repeater PCIe gen1,2 Trace PCIe gen1,2 Repeater Trace, eg. FR4 Chipset Figure 1 IDT Repeaters in Blade Servers IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. 2011 Integrated Device Technology, Inc February 8, 2011 IDT 89HP0504PB Data Sheet PCIe Compliance The device was designed to provide end users with features needed to comply with PCIe system application requirements Receiver Detection Support, PCIe Beacon Support Receiver supports high impedance mode for PCIe Jitter, eye opening, and all other key AC and DC specifications. Block Diagram The P0504PB contains four high speed channels as shown in Figure Each channel can be routed to different outputs. Depending on user configuration via mode selections, input traffic can be muxed or demuxed. Powerdown PDB and Receiver Detection Reset RSTB are provided for state and channel control. Figure 2 Block Diagram February 8, 2011 Table of Contents Device Overview 1 Benefits 1 Typical Application 1 PCIe Compliance 2 Block 2 Functional Description 5 February 8, 2011 IDT 89HP0504PB Data Sheet PAGE INTENTIONALLY LEFT BLANK February 8, 2011 IDT 89HP0504PB Data Sheet Functional Description The P0504PB has 4 channels, each with the individually programmable features listed below. Figure 3 diagrams the channel and Table 1 summarizes key configuration options. Electrical Idle detection with glitch filter Channel power-down Input termination 100 ohm Programmable equalizer 0 to 14dB Up to 10dB Auto-boost Programmable Transmitter De-emphasis 0 to -6.5dB Voltage swing 500mV to 950mV Output termination 100 ohm Receiver detection Figure 3 Channel Block Diagram with Channel Features Per-channel programmable features used at the Receive side. Input equalization with 3 levels 2 to 14dB compensation for high frequency signal attenuation due to cables and board traces. Additionally, up to 10dB boost is added automatically by the equalizer for applications using long cables. The total equalization range is between 2dB and 24dB. Input high impedance control via channel enable disabled active mode and hi-Z power-down . Per-channel programmable features used at the Transmit side. Output de-emphasis with 8 levels 0 to -6.5dB. The de-emphasis boosts the magnitude of higher frequencies sent by the transmitter to compensate for high frequency losses travelling through output side cable or output side board traces. This ensures that the final received signal has a wider eye opening. Output differential swing with 3 levels 0.5V to 0.95V peak-to-peak . Receiver detection enable or disable. This function is activated following an RSTB pulse. • With receiver detection enabled, if A0 and A1 channels do not detect at least one receiver, then the P0504PB on-chip Rx termination on A0 and A1 is set to hi-Z as shown in Table • With receiver detection enabled, if B0 and B1 channels do not detect at least one receiver, then the P0504PB on-chip Rx termination on B0 and B1 is set to hi-Z as shown in Table Electrical idle detection When the incoming differential peak-peak amplitude falls below 110mV, the device enters electrical idle mode and the corresponding transmitter stops toggling, maintains its common mode voltage level, and meets all electrical idle specifications described in the AC Specifications section of this data sheet. In addition, the device contains global configuration of the data path: Transfer modes direct connect, cross-connect, multicast. February 8, 2011 IDT 89HP0504PB Data Sheet Power-Up After the power supplies reach their minimum required levels, the P0504PB powers up by setting all input and output pins to known states All the device's input configuration pins are set internally to VSS or VDD for 2-level pins and to VDD/2 for 3-level pins. High speed differential input and output pins depend on various conditions described below High speed differential input and output pins are in high impedance if any of the following conditions is true • Powerdown is set PDB pin = 0V or • No receiver termination was detected at TX outputs In all other cases, high speed differential input and output pins are set to 50 ohms per pin, with 100 ohms differential impedance. Also refer to Table 4, Power Reducing Modes, Table 2, Receiver Impedance, and Table 3, Transmitter Impedance. The power ramp up time for the P0504PB should be less than 1ms. Power Sequencing There are no power sequencing constraints for the P0504PB. IDT EyeBoost Technology IDT EyeBoost technology is a method of data stream recovery even when the differential signal eye is completely closed due to cable or trace attenuation and ISI jitter. With IDT EyeBoost , the system designer can both recover the incoming data and retransmit it to target device with a maximized eye width and amplitude. An example of IDT EyeBoost technology usage in a system application and eye diagram results are shown in Figure In this figure, the a diagram shows incoming differential signal closed eye after 62 inch FR4 connection from signal source and the b diagram shows differential signal at the output of repeater maximized eye opening with IDT EyeBoost technology. Figure 4 Eye Diagram February 8, 2011 IDT 89HP0504PB Data Sheet Ordering Information NN AA AAA A Product Operating Product Speed Chnls Protocol Device Pkg Temp Tape & Family Voltage Detail Range Reel Legend A = Alpha Character N = Numeric Character 8 Blank I Tape & Reel Commercial Temperature 0°C to +70°C Ambient Industrial Temperature -40° C to +85° C Ambient NRG36 36-pin QFN, Green PCIe Interface, “B” version 4 Channels 5Gbps rePeater 1.2V +/- 5% Signal Integrity Product Valid Combinations 89HP0504PBZBNRG / 89HP0504PBZBNRG8 36-pin Green QFN package, Commercial Temperature 89HP0504PBZBNRGI / 89HP0504PBZBNRGI8 36-pin Green QFN package, Industrial Temperature CORPORATE HEADQUARTERS for SALES: for Tech Support: 6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 email: San Jose, CA 95138 fax 408-284-2775 phone 408-284-8208 DISCLAIMER Integrated Device Technology, Inc. IDT and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners. Copyright All rights reserved. February 8, 2011

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4 Channel 5Gbps Signal

Repeater
89HP0504PB Data Sheet

Device Overview

The IDT 89HP0504PB P0504PB is a 5Gbps Repeater device featuring IDT EyeBoost technology that compensates for cable and board trace attenuations and ISI jitter, thereby extending connection reach. The device is optimized for PCIe Gen1 and Gen2 high speed serial data streams and contains four data channels, each able to process 5Gbps transmission rates. Each channel consists of an input equalizer and amplifier, signal detection with glitch filter, as well as programmable output swing and de-emphasis. Allowing for application specific optimization, the P0504PB, with its configurable receiver and transmitter features, is ideal for PCIe applications using a wide combination of cables and board trace materials.

All modes of active data transfer are designed with minimized power consumption. In full shutdown mode, the part consumes less than 40mW in worst case environmental conditions.

Blade servers, rack servers PCIe instrumentation Storage systems Cabled PCIe devices

Compensates for cable and PCB trace attenuation and ISI jitter

Programmable receiver equalization up to 24db Programmable transmitter swing and de-emphasis Recovers data stream even when the differential signal eye
is completely closed due to trace attenuation and ISI jitter Full PCIe protocol support Configurable via external pins Leading edge power minimization in active and shutdown
modes No external bias resistors or reference clocks required Channel mux mode, demux mode, 1 to 2 channels multicast,
and Z-switch function mode Available in a 36-pin QFN package x 7.5mm with 0.5mm
pitch

Extends maximum cable length to over 8 meters and trace length over 48 inches in PCIe applications

Minimizes BER

Server

Backplane

Server

Chipset

PCIe gen1,2

Trace, eg. FR4 Repeater

PCIe gen1,2 Trace

PCIe gen1,2

Repeater Trace, eg. FR4

Chipset

Figure 1 IDT Repeaters in Blade Servers

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
2011 Integrated Device Technology, Inc

February 8, 2011

IDT 89HP0504PB Data Sheet

PCIe Compliance

The device was designed to provide end users with features needed to comply with PCIe system application requirements Receiver Detection Support, PCIe Beacon Support Receiver supports high impedance mode for PCIe Jitter, eye opening, and all other key AC and DC specifications.

Block Diagram

The P0504PB contains four high speed channels as shown in Figure Each channel can be routed to different outputs. Depending on user configuration via mode selections, input traffic can be muxed or demuxed. Powerdown PDB and Receiver Detection Reset RSTB are provided for state and channel control.

Figure 2 Block Diagram

February 8, 2011

Table of Contents

Device Overview 1 Benefits 1 Typical Application 1 PCIe Compliance 2 Block 2 Functional Description 5
February 8, 2011

IDT 89HP0504PB Data Sheet

PAGE INTENTIONALLY LEFT BLANK

February 8, 2011

IDT 89HP0504PB Data Sheet

Functional Description

The P0504PB has 4 channels, each with the individually programmable features listed below. Figure 3 diagrams the channel and Table 1 summarizes key configuration options.

Electrical Idle detection with glitch filter

Channel power-down

Input
termination 100 ohm

Programmable equalizer
0 to 14dB

Up to 10dB Auto-boost

Programmable Transmitter

De-emphasis 0 to -6.5dB Voltage swing 500mV to
950mV

Output
termination
100 ohm

Receiver detection

Figure 3 Channel Block Diagram with Channel Features

Per-channel programmable features used at the Receive side.

Input equalization with 3 levels 2 to 14dB compensation for high frequency signal attenuation due to cables and board traces. Additionally, up to 10dB boost is added automatically by the equalizer for applications using long cables. The total equalization range is between 2dB and 24dB.

Input high impedance control via channel enable disabled active mode and hi-Z power-down . Per-channel programmable features used at the Transmit side.

Output de-emphasis with 8 levels 0 to -6.5dB. The de-emphasis boosts the magnitude of higher frequencies sent by the transmitter to compensate for high frequency losses travelling through output side cable or output side board traces. This ensures that the final received signal has a wider eye opening.

Output differential swing with 3 levels 0.5V to 0.95V peak-to-peak . Receiver detection enable or disable. This function is activated following an RSTB pulse.
• With receiver detection enabled, if A0 and A1 channels do not detect at least one receiver, then the P0504PB on-chip Rx termination on A0 and A1 is set to hi-Z as shown in Table
• With receiver detection enabled, if B0 and B1 channels do not detect at least one receiver, then the P0504PB on-chip Rx termination on B0 and B1 is set to hi-Z as shown in Table

Electrical idle detection When the incoming differential peak-peak amplitude falls below 110mV, the device enters electrical idle mode and the corresponding transmitter stops toggling, maintains its common mode voltage level, and meets all electrical idle specifications described in the AC Specifications section of this data sheet.

In addition, the device contains global configuration of the data path:

Transfer modes direct connect, cross-connect, multicast.

February 8, 2011

IDT 89HP0504PB Data Sheet

Power-Up After the power supplies reach their minimum required levels, the P0504PB powers up by setting all input and output pins to known states All the device's input configuration pins are set internally to VSS or VDD for 2-level pins and to VDD/2 for 3-level pins. High speed differential input and output pins depend on various conditions described below High speed differential input and output pins are in high impedance if any of the following conditions is true
• Powerdown is set PDB pin = 0V or
• No receiver termination was detected at TX outputs In all other cases, high speed differential input and output pins are set to 50 ohms per pin, with 100 ohms differential impedance. Also refer to Table 4, Power Reducing Modes, Table 2, Receiver Impedance, and Table 3, Transmitter Impedance. The power ramp up time for the P0504PB should be less than 1ms.

Power Sequencing There are no power sequencing constraints for the P0504PB.

IDT EyeBoost Technology IDT EyeBoost technology is a method of data stream recovery even when the differential signal eye is completely closed due to cable or trace
attenuation and ISI jitter. With IDT EyeBoost , the system designer can both recover the incoming data and retransmit it to target device with a maximized eye width and amplitude. An example of IDT EyeBoost technology usage in a system application and eye diagram results are shown in Figure In this figure, the a diagram shows incoming differential signal closed eye after 62 inch FR4 connection from signal source and the b diagram shows differential signal at the output of repeater maximized eye opening with IDT EyeBoost technology.

Figure 4 Eye Diagram

February 8, 2011

IDT 89HP0504PB Data Sheet
Ordering Information

NN AA

AAA A

Product Operating Product Speed Chnls Protocol Device Pkg Temp Tape &

Family Voltage Detail

Range Reel

Legend A = Alpha Character N = Numeric Character
8 Blank I

Tape & Reel

Commercial Temperature 0°C to +70°C Ambient Industrial Temperature -40° C to +85° C Ambient

NRG36 36-pin QFN, Green

PCIe Interface, “B” version
4 Channels
5Gbps
rePeater
1.2V +/- 5%

Signal Integrity Product

Valid Combinations 89HP0504PBZBNRG / 89HP0504PBZBNRG8 36-pin Green QFN package, Commercial Temperature 89HP0504PBZBNRGI / 89HP0504PBZBNRGI8 36-pin Green QFN package, Industrial Temperature

CORPORATE HEADQUARTERS
for SALES:
for Tech Support:
6024 Silver Creek Valley Road
800-345-7015 or 408-284-8200
email:

San Jose, CA 95138
fax 408-284-2775
phone 408-284-8208

DISCLAIMER Integrated Device Technology, Inc. IDT and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties.

IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.

Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners.

Copyright All rights reserved.

February 8, 2011

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived 89HP0504PBZBNRG Datasheet file may be downloaded here without warranties.

Datasheet ID: 89HP0504PBZBNRG 636729