WJLXT6155LE.B5-866256

WJLXT6155LE.B5-866256 Datasheet

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WJLXT6155LE.B5-866256	WJLXT6155LE.B5-866256 (pdf)

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WJLXT6155LE.B5-866255	WJLXT6155LE.B5-866255

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Cortina LXT6155 155 Mbps SDH/SONET/ATM Transceiver Datasheet The Cortina LXT6155 155 Mbps SDH/SONET/ATM Transceiver LXT6155 Transceiver is a high speed fully integrated transceiver designed for 155 Mbps SDH/SONET/ATM transmission system applications. The LXT6155 Transceiver provides a LVPECL interface for fiber optics modules, and a CMI interface for coax cable drive. These circuits are implemented using Cortina Systems, Inc.’s proven low power 3.3V CMOS analog and digital circuits. The transmitter incorporates a parallel-to-serial converter, a frequency multiplier PLL, CMI line encoders, and line interfaces for both coax cable and optical fiber. The receiver incorporates an adaptive equalizer, a clock recovery PLL, Loss of Signal LOS detector, CMI and NRZ decoders, a serial-to-parallel converter, and an SDH/SONET frame byte detector/aligner. At the system interface, the LXT6155 Transceiver offers both parallel 8-bit and serial differential interfaces. The LXT6155 Transceiver also operates in either Hardware stand-alone mode or Software mode. Software mode is controlled by a serial microprocessor µP to program formats and operating/ test modes. Product Features Complies with Bellcore* SONET GR-253 ITU-T G.703/813/958 STM1 Two line interface formats: Fiber LVPECL NRZ Coax CMI Transmit synthesizer PLL Receive clock recovery PLL Adaptive CMI equalizer Analog circuitry for transformer drive Programmable LOS function CMI encoder and decoder Serial/Parallel and Parallel/Serial conversion Byte alignment for SDH/SONET frames Two modes of operation: Microprocessor controlled software mode Stand-alone hardware mode No external crystal required. A MHz crystal is optional Low power consumption less than 760 mW typical Operates from a single V supply 64 pin LQFP package OC3/STM1 SDH/SONET Cross Connects OC3/STM1 SDH/SONET Add/Drop Mux OC3/STM1 Transmission Systems OC3/STM1 Short Haul Serial Links OC3/STM1 ATM/WAN Transmission Systems OC3/STM1 ATM/WAN Access Systems Legal Disclaimer INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH CORTINA PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN CORTINA'S TERMS AND CONDITIONS OF SALE OF SUCH PRODUCTS, CORTINA ASSUMES NO LIABILITY WHATSOEVER, AND CORTINA DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF CORTINA PRODUCTS, INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Cortina products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. CORTINA , and the Cortina Earth Logo are trademarks or registered trademarks of Cortina Systems, Inc. or its subsidiaries in the US and other countries. Any other product and company names are the trademarks of their respective owners. Copyright 2001-2007 Cortina Systems, Inc. All rights reserved. Cortina LXT6155 155 Mbps SDH/SONET/ATM Transceiver Contents Contents LXT6155 Transceiver Block Pin Assignments and Signal 9 Functional 14 14 Transmitted Signal 15 Fiber Based G.957/GR-253 Transmission Systems 15 Coax Based G.703/GR-253 Transmission 15 CMI Encoding 15 Tx Clock Monitoring 16 16 Analog Front End and Timing Recovery 16 CMI Mode NRZ Receive Frame Detect and Byte Alignment 17 Loss of Signal 18 Coax 18 Fiber 18 Clocks 19 Parallel Mode 19 Transmit Parallel Input Clock TPICLK 19 Receive Parallel Output Clock RPOCLK 19 Serial 19 Transmit Serial Input Clock TSICLKP/TSICLKN 19 Receive Serial Output Clock RSOCLKP/RSOCLKN 19 Crystal Reference Clock 20 Jitter 20 Jitter Tolerance 20 Jitter Generation Intrinsic 20 Jitter 20 Operational Modes 20 Hardware Mode 21 PLL Clock Reference CIS pin 21 Loopback Test RLIS and LLIS pins 22 Line Interface Selection MODE Pin 22 Parallel/Serial Mode Selection SP pin 22 Tx Amplitude Trim 23 Software 23 Serial Input Clock SCLK 23 Chip Select Input CS 23 Serial Input Word SDI 23 Serial Output Word SDO 23 Serial System 25 Parallel System Interface 25 Loopback Modes 26 Local 26 Remote 26 Register 27 Cortina LXT6155 155 Mbps SDH/SONET/ATM Transceiver Figures Application Information 34 Fiber Optic Module Interface Coax Interface 35 Test Specifications 38 Mechanical Specifications 50 Figures 1 LXT6155 Transceiver Block Diagram 8 2 LXT6155 Transceiver Pin Assignments 9 3 LXT6155 Transceiver System Interface 14 4 Example of CMI Encoded Binary 15 5 Receive Frame Synchronization and Frame Pulse Position 17 6 Framing State 18 7 Criteria for LOS 18 8 Hardware Mode 21 9 Software Mode 24 10 Serial Data Output Word Structure Read Cycle R/W=High 24 11 Serial Data Input Word Structure Write Cycle R/W = Low 24 12 Serial Interface 25 13 Parallel 25 14 Local Loopback 26 15 Remote Loopback 26 16 V LVPECL to V LVPECL Interface 35 17 75 Ohm Coax Cable Interface 36 18 Transmit Parallel Input Data Timing 19 Transmit Serial Input Data Timing 40 20 Receive Serial Output Data Timing 41 21 Receive Parallel Output Data Timing 42 22 Microprocessor Input Timing 44 23 Microprocessor Output Timing Diagram 44 24 CMI Encoded Zero per G.703 and STS-3 45 25 CMI Encoded One per G.703 and STS-3 46 26 Jitter Tolerance template Values from Table 34 47 27 Jitter Generation Measurement Filter Characteristics 48 28 Typical Coax Jitter 29 Typical Fiber Jitter Transfer 30 LXT6155 Transceiver LE Package Specification 50 Tables 1 Pin 10 2 Standards Compliance 15 3 Reference Clock Settings 21 4 Loopback Selection 22 5 MODE Line Interface Settings 22 6 Device Address/Control 27 7 LXT6155 Transceiver Register Map A<3:0> 27

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Cortina LXT6155 155 Mbps SDH/SONET/ATM Transceiver

Datasheet

The Cortina LXT6155 155 Mbps SDH/SONET/ATM Transceiver LXT6155 Transceiver is a high speed fully integrated transceiver designed for 155 Mbps SDH/SONET/ATM transmission system applications. The LXT6155 Transceiver provides a LVPECL interface for fiber optics modules, and a CMI interface for coax cable drive. These circuits are implemented using Cortina Systems, Inc.’s proven low power 3.3V CMOS analog and digital circuits. The transmitter incorporates a parallel-to-serial converter, a frequency multiplier PLL, CMI line encoders, and line interfaces for both coax cable and optical fiber. The receiver incorporates an adaptive equalizer, a clock recovery PLL, Loss of Signal LOS detector, CMI and NRZ decoders, a serial-to-parallel converter, and an SDH/SONET frame byte detector/aligner. At the system interface, the LXT6155 Transceiver offers both parallel 8-bit and serial differential interfaces. The LXT6155 Transceiver also operates in either Hardware stand-alone mode or Software mode. Software mode is controlled by a serial microprocessor µP to program formats and operating/ test modes.

Product Features

Complies with Bellcore* SONET GR-253

ITU-T G.703/813/958 STM1 Two line interface formats:

Fiber LVPECL NRZ

Coax CMI Transmit synthesizer PLL Receive clock recovery PLL Adaptive CMI equalizer Analog circuitry for transformer drive Programmable LOS function CMI encoder and decoder Serial/Parallel and Parallel/Serial conversion Byte alignment for SDH/SONET frames

Two modes of operation:

Microprocessor controlled software mode

Stand-alone hardware mode No external crystal required. A MHz
crystal is optional Low power consumption less than 760 mW
typical Operates from a single V supply 64 pin LQFP package

OC3/STM1 SDH/SONET Cross Connects OC3/STM1 SDH/SONET Add/Drop Mux OC3/STM1 Transmission Systems

OC3/STM1 Short Haul Serial Links OC3/STM1 ATM/WAN Transmission Systems OC3/STM1 ATM/WAN Access Systems

Legal Disclaimer

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH CORTINA PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN CORTINA'S TERMS AND CONDITIONS OF SALE OF SUCH PRODUCTS, CORTINA ASSUMES NO LIABILITY WHATSOEVER, AND CORTINA DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF CORTINA PRODUCTS, INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Cortina products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. CORTINA , and the Cortina Earth Logo are trademarks or registered trademarks of Cortina Systems, Inc. or its subsidiaries in the US and other countries. Any other product and company names are the trademarks of their respective owners. Copyright 2001-2007 Cortina Systems, Inc. All rights reserved.

Cortina LXT6155 155 Mbps SDH/SONET/ATM Transceiver

Contents

Contents

LXT6155 Transceiver Block

Pin Assignments and Signal 9

Functional 14
14 Transmitted Signal 15 Fiber Based G.957/GR-253 Transmission Systems 15 Coax Based G.703/GR-253 Transmission 15 CMI Encoding 15 Tx Clock Monitoring 16
16 Analog Front End and Timing Recovery 16 CMI Mode NRZ Receive Frame Detect and Byte Alignment 17 Loss of Signal 18 Coax 18 Fiber 18

Clocks 19 Parallel Mode 19 Transmit Parallel Input Clock TPICLK 19 Receive Parallel Output Clock RPOCLK 19 Serial 19 Transmit Serial Input Clock TSICLKP/TSICLKN 19 Receive Serial Output Clock RSOCLKP/RSOCLKN 19 Crystal Reference Clock 20

Jitter 20 Jitter Tolerance 20 Jitter Generation Intrinsic 20 Jitter 20

Operational Modes 20 Hardware Mode 21 PLL Clock Reference CIS pin 21 Loopback Test RLIS and LLIS pins 22 Line Interface Selection MODE Pin 22 Parallel/Serial Mode Selection SP pin 22 Tx Amplitude Trim 23 Software 23 Serial Input Clock SCLK 23 Chip Select Input CS 23 Serial Input Word SDI 23 Serial Output Word SDO 23

Serial System 25 Parallel System Interface 25 Loopback Modes 26

Local 26 Remote 26

Register 27

Cortina LXT6155 155 Mbps SDH/SONET/ATM Transceiver

Figures

Application Information 34

Fiber Optic Module Interface Coax Interface 35

Test Specifications 38

Mechanical Specifications 50

Figures
1 LXT6155 Transceiver Block Diagram 8 2 LXT6155 Transceiver Pin Assignments 9 3 LXT6155 Transceiver System Interface 14 4 Example of CMI Encoded Binary 15 5 Receive Frame Synchronization and Frame Pulse Position 17 6 Framing State 18 7 Criteria for LOS 18 8 Hardware Mode 21 9 Software Mode 24 10 Serial Data Output Word Structure Read Cycle R/W=High 24 11 Serial Data Input Word Structure Write Cycle R/W = Low 24 12 Serial Interface 25 13 Parallel 25 14 Local Loopback 26 15 Remote Loopback 26 16 V LVPECL to V LVPECL Interface 35 17 75 Ohm Coax Cable Interface 36 18 Transmit Parallel Input Data Timing 19 Transmit Serial Input Data Timing 40 20 Receive Serial Output Data Timing 41 21 Receive Parallel Output Data Timing 42 22 Microprocessor Input Timing 44 23 Microprocessor Output Timing Diagram 44 24 CMI Encoded Zero per G.703 and STS-3 45 25 CMI Encoded One per G.703 and STS-3 46 26 Jitter Tolerance template Values from Table 34 47 27 Jitter Generation Measurement Filter Characteristics 48 28 Typical Coax Jitter 29 Typical Fiber Jitter Transfer 30 LXT6155 Transceiver LE Package Specification 50

Tables
1 Pin 10 2 Standards Compliance 15 3 Reference Clock Settings 21 4 Loopback Selection 22 5 MODE Line Interface Settings 22 6 Device Address/Control 27 7 LXT6155 Transceiver Register Map A<3:0> 27

More datasheets: 1985 | AT93C46C-10SI-2.7 | AT93C46C-10PI-2.7 | AT93C46C-10SI-2.5 | CS-1050-R | CS-1100-R | CS-1200-R | J100N50X4 | CDC50-24 | WJLXT6155LE.B5-866255

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Datasheet ID: WJLXT6155LE.B5-866256 506893