System Basis Chip TLE 6263-3G
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TLE62633GXUMA1 (pdf) |
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System Basis Chip TLE 6263-3G Integrated LS-CAN, LDO and HS-Switch Automotive and Industrial Never stop thinking. System Basic Chip Data Sheet TLE6263-3G • Standard fault tolerant differential CAN-transceiver • Bus failure management • Low power mode management • Receive only mode for CAN • CAN data transmission rate up to 125 kBaud • Low-dropout voltage 5V regulator • High side switch • 2 wake-up inputs • Power on and under-voltage reset generator • Window watchdog • Fail-safe output • Early warning feature VCC warning • Sense comparator input VINT warning • Standard 8 bit SPI-interface • Flash program mode • Wide input voltage range • Wide temperature range • Enhanced power PG-DSO-Package • Green Product RoHS compliant • AEC Qualiified PG-DSO-28-27 Enhanced Power Type TLE6263-3G Ordering Code on request Package PG-DSO-28-27 The TLE6263 is a monolithic integrated circuit in an enhanced power PG-DSO-28-27 package. The IC is optimized for use in advanced automotive electronic control units for body and convenience applications. To support this applications the TLE6263 covers the main smart power functions such as failure tolerant low speed CAN-transceiver for differential mode data transmission, low dropout voltage regulator LDO for internal and external 5V supply as well as a SPI serial peripheral interface to control and monitor the IC. Further there are integrated additional features like a high side switch that can be used e.g. for cyclic supply of an external wake-up circuitry, two wake-up inputs, a window watchdog circuit with fail safe output as well as a reset and early warning feature. The IC is designed to withstand the severe conditions of automotive applications. 2008-11-26 Pin Configuration top view Data Sheet TLE 6263-3G TxD 1 RxD 2 RO 3 WK2 4 WK1 5 GND 6 GND 7 GND 8 GND 9 DO 10 CLK 11 CSN 12 DI 13 OUTHS 14 P-DSO-28-27 enhanced power package Figure 1 Pin Configuration TLE6263-3G top view 28 INT 27 RTH 26 CANH 25 RTL 24 CANL 23 GND 22 GND 21 GND 20 GND 19 VCC 18 VCI 17 FSO 16 SI 15 VS 2008-11-26 Data Sheet TLE 6263-3G Pin Definitions and Functions Pin No. Symbol Function Transmit data input integrated pull up; LOW bus becomes dominant, HIGH bus becomes recessive Receive data output push-pull output; LOW bus becomes dominant, HIGH bus becomes recessive Reset output open drain output, integrated pull up, active low Wake-Up input 2 for detection of external wake-up events, edge sensitive, in sleep mode monitored by cyclic sense feature when selected weak pull up 2µA to avoid unwanted wake ups Wake-Up input 1 for detection of external wake-up events, edge sensitive, in sleep mode monitored by cyclic sense feature when selected weak pull up 2µA to avoid unwanted weak ups 6, 7, 8, 9, GND 20, 21, 22, 23 Ground to reduce thermal resistance place cooling areas on PCB close to this pins. SPI data output this tri-state output transfers diagnosis data to the control device. Serial data transfered from DO is a 8 bit diagnosis word with the Least Significant Bit LSB transmitted first. The output will remain 3-stated unless the device is selected by a LOW on Chip-Select-Not CSN . DO will accept data on the rising edge of CLK-signal see table 4, 5, 6 for Diagnosis protocol SPI clock input clocks the shiftregister CLK has a pull down input, active HIGH, and requires CMOS logic level inputs |
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