S5U13A05P00C100

S5U13A05P00C100 Datasheet


S5U13A05P00C100 Evaluation Board User Manual

Part Datasheet
S5U13A05P00C100 S5U13A05P00C100 S5U13A05P00C100 (pdf)
PDF Datasheet Preview
S1D13A05 LCD/USB Companion Chip

S5U13A05P00C100 Evaluation Board User Manual

Epson Research and Development Vancouver Design Center

Evaluation Board/Kit and Development Tool Important Notice

This evaluation board/kit or development tool is designed for use for engineering evaluation, demonstration, or development purposes only. Do not use it for other purposes. It is not intended to meet the requirements of design for finished products.

This evaluation board/kit or development tool is intended for use by an electronics engineer and is not a consumer product. The user should use it properly and in a safe manner. Seiko Epson does not assume any responsibility or liability of any kind of damage and/or fire caused by the use of it. The user should cease to use it when any abnormal issue occurs even during proper and safe use.

The part used for this evaluation board/kit or development tool may be changed without any notice.

NOTICE

No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. When exporting the products or technology described in this material, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You are requested not to use, to resell, to export and/or to otherwise dispose of the products and any technical information furnished, if any for the development and/or manufacture of weapon of mass destruction or for other military purposes.

All brands or product names mentioned herein are trademarks and/or registered trademarks of their respective companies.

SEIKO EPSON CORPORATION 2007 - 2012, All rights reserved.

S1D13A05 X40A-G-014-01

S5U13A05P00C100 Evaluation Board User Manual Issue Date 2006/11/01

Epson Research and Development Vancouver Design Center

Table of Contents
1 Introduction 5
2 Features 6
3 Installation and Configuration 7 Configuration DIP Switches 7 Configuration Jumpers 9
4 CPU Interface 11 CPU Interface Pin Mapping 11 CPU Bus Connector Pin Mapping 12
5 LCD Interface Pin Mapping 14
6 Technical Description 16 PCI Bus Support 16 Direct Host Bus Interface Support 16 S1D13A05 Embedded Memory 16 Software Adjustable LCD Backlight Intensity Support Using PWM 16 LCD Panel Support 17 LCD Connector 17 Extended LCD Connector 17 TFT Type 3 Extended LCD Connector 18 USB Support 18 USB IRQ Support 18 External oscillator support for CLKI and CLKI2 18 External oscillator support for USBCLK 18
7 References 19 Documents 19 Document Sources 19
8 Parts List 20
9 Schematics 22
10 Board Layout 28
11 Sales and Technical Support 30 Epson Companion Chips S1D13A05 30 Ordering Information 30

S5U13A05P00C100 Evaluation Board User Manual Issue Date 2006/11/01

S1D13A05 X40A-G-014-01

Epson Research and Development Vancouver Design Center

S1D13A05 X40A-G-014-01

S5U13A05P00C100 Evaluation Board User Manual Issue Date 2006/11/01

Epson Research and Development Vancouver Design Center

Page 5
1 Introduction

This manual describes the setup and operation of the S5U13A05P00C100 Evaluation Board. The board is designed as an evaluation platform for the S1D13A05 LCD/USB Companion Chip.

We appreciate your comments on our documentation. Please contact us via email at

S5U13A05P00C100 Evaluation Board User Manual Issue Date 2006/11/01

S1D13A05 X40A-G-014-01

Page 6

Epson Research and Development Vancouver Design Center
2 Features

Following are some features of the S5U13A05P00C100 Evaluation Board
• 121-pin PFBGA S1D13A05 Embedded Memory LCD Controller with 256K bytes of
embedded SRAM.
• PCI bus operation through onboard PCI bridge.
• CPU/Bus interface header strips for non-PCI bus operation.
• Configuration options.
• Software adjustable backlight intensity support using PWMOUT.
• 4/8-bit 3.3V or 5V single monochrome passive LCD panel support.
• 4/8/16-bit 3.3V or 5V single color passive LCD panel support.
• 9/12/18-bit 3.3V or 5V active matrix TFT LCD panel support.
• Direct interface for 18-bit Sharp HR-TFT LCD panel support.
• Direct interface for 18-bit Casio TFT LCD panel support.
• Direct interface for 18-bit TFT Type 2 LCD panel support
• Direct interface for 18-bit TFT Type 3 LCD panel support
• Direct interface for 18-bit TFT Type 4 Epson ND-TFD LCD panel support.
• Connector for USB client support.
• Oscillators for CLKI and CLKI2.

S1D13A05 X40A-G-014-01

S5U13A05P00C100 Evaluation Board User Manual Issue Date 2006/11/01

Epson Research and Development Vancouver Design Center

Page 7
3 Installation and Configuration

The S5U13A05P00C100 is designed to support as many platforms as possible. The S5U13A05P00C100 incorporates a DIP switch and three jumpers which allow both the evaluation board and the S1D13A05 LCD controller to be configured for a specified evaluation platform.

Configuration DIP Switches

The S1D13A05 has seven configuration inputs CNF[6:0] which are read on the rising edge of RESET#. In order to configure the S1D13A05 for multiple Host Bus Interfaces an eight-position DIP switch SW1 is required. The following figure shows the location of DIP switch SW1 on the S5U13A05P00C100.

DIP Switch - SW1

Figure 3-1 Configuration DIP Switch SW1 Location

S5U13A05P00C100 Evaluation Board User Manual Issue Date 2006/11/01

S1D13A05 X40A-G-014-01

Page 8

Epson Research and Development Vancouver Design Center

All S1D13A05 configuration inputs are fully configurable using the eight position DIP switch as described below.

Switch SW1

SW1-5, SW1-[3:1]

S1D13A05 Signal

CNF4, CNF[2:0]

Table 3-1 Configuration DIP Switch Settings

Value on this pin at rising edge of RESET# is used to configure:

Closed On/1

Open Off/0
Ordering Information

To order the S5U13A05P00C100 Evaluation Board, contact the Epson sales representative in your area and order part number S5U13A05P00C100.

S1D13A05 X40A-G-014-01

S5U13A05P00C100 Evaluation Board User Manual Issue Date 2006/11/01

Epson Research and Development Vancouver Design Center

Change Record

X40A-G-014-01 X40A-G-014-01 X40A-G-014-00

Page 31

S5U13A05P00C100 Evaluation Board User Manual Issue Date 2006/11/01

S1D13A05 X40A-G-014-01
More datasheets: PW153KB1203F01 | PW153KB1803F01 | PW153KB1503F01 | GSB4211311WEU | 9062 | FJV4112RMTF | B5771 | AFB0624EHDC9 | EKI-6311GN-EU-AE | EKI-6311GN-AE


Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived S5U13A05P00C100 Datasheet file may be downloaded here without warranties.

Datasheet ID: S5U13A05P00C100 511892