CY8C29666-24LFXIT

CY8C29666-24LFXIT Datasheet


CY8C29466, CY8C29566 CY8C29666, CY8C29866

Part Datasheet
CY8C29666-24LFXIT CY8C29666-24LFXIT CY8C29666-24LFXIT (pdf)
Related Parts Information
CY8C29666-24LFXI CY8C29666-24LFXI CY8C29666-24LFXI
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CY8C29466, CY8C29566 CY8C29666, CY8C29866

Programmable System-on-Chip

Programmable System-on-Chip
• Powerful Harvard-architecture processor M8C processor speeds to 24 MHz Two 8 x 8 multiply, 32-bit accumulate Low power at high speed Operating voltage V to V Operating voltages down to V using on-chip switch mode pump SMP Industrial temperature range °C to +85 °C
• Advanced peripherals blocks 12 rail-to-rail analog PSoC blocks provide
• Up to 14-bit analog-to-digital converters ADCs
• Up to 9-bit digital-to-analog converters DACs
• Programmable gain amplifiers PGAs
• Programmable filters and comparators 16 digital PSoC blocks provide
• 8- to 32-bit timers, counters, and pulse-width modulators PWMs
• Cyclical redundancy check CRC and pseudo random sequence PRS modules
• Up to four full-duplex universal asynchronous receiver transmitters UARTs
• Multiple serial peripheral interface SPI masters or slaves
• Can connect to all general-purpose I/O GPIO pins Create complex peripherals by combining blocks
• Precision, programmable clocking Internal 24- / 48-MHz main oscillator 24- / 48-MHz with optional kHz crystal Optional external oscillator, up to 24 MHz Internal oscillator for watchdog and sleep
• Flexible on-chip memory 32 KB flash program storage 50,000 erase/write cycles 2 KB static random access memory SRAM data storage In-system serial programming ISSP Partial flash updates Flexible protection modes Electrically erasable programmable read-only memory EEPROM emulation in flash
• Programmable pin configurations 25-mA sink, 10-mA source on all GPIOs Pull-up, pull-down, high Z, strong, or open-drain drive modes on all GPIOs Eight standard analog inputs on GPIOs, plus four additional analog inputs with restricted routing Four 40 mA analog outputs on GPIOs Configurable interrupt on all GPIOs
• Additional system resources I2C slave, master, and multi-master to 400 kHz Watchdog and sleep timers User-configurable low-voltage detection LVD Integrated supervisory circuit On-chip precision voltage reference
• Complete development tools

Free development software PSoC Designer Full-featured in-circuit emulator ICE and
programmer Full-speed emulation Complex breakpoint structure 128 KB trace memory Complex events C compilers, assembler, and linker

Logic Block Diagram

PSoC CORE

Port 0 with 7 6 5 4 3 2 1 Analog Drivers

System Bus

Global Digital Interconnect

Global Analog Interconnect

SRAM 256 Bytes

SROM Flash 16 KB

Interrupt Controller

CPU Core M8C

Sleep and Watchdog

Multiple Clock Sources Includes IMO, ILO, PLL, and ECO

DIGITAL SYSTEM

Digital Block Array

ANALOG SYSTEM

Analog Block Array

Analog Ref.

Analog Input

Muxing

Digital Clocks

Multiply Accum.

Decimator

POR and LVD Internal

Voltage

System Resets Ref.

SYSTEM RESOURCES

Switch

Mode Pump
• San Jose, CA 95134-1709
• 408-943-2600
Accessories Emulation and Programming 51 Ordering Information 52
Ordering Code Definitions 52 Acronyms 53

Acronyms Used 53 Reference Documents 53

Document Conventions 54 Units of Measure 54 Numeric Conventions 54 Glossary 54 Document History Page 59 Sales, Solutions, and Legal Information 61 Worldwide Sales and Design Support 61 Products 61 PSoC Solutions 61

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PSoC Functional Overview

The PSoC family consists of many Programmable System-on-Chip controller devices. These devices are designed to replace multiple traditional microcontroller unit MCU -based system components with one, low-cost single-chip programmable device. PSoC devices include configurable blocks of analog and digital logic, as well as programmable interconnects. This architecture allows you to create customized peripheral configurations that match the requirements of each individual application. Additionally, a fast central processing unit CPU , flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts and packages.

The PSoC architecture, as illustrated in the Logic Block Diagram on page 1, consists of four main areas PSoC core, digital system, analog system, and system resources. Configurable global busing allows all of the device resources to be combined into a complete custom system. The PSoC CY8C29x66 family can have up to five I/O ports that connect to the global digital and analog interconnects, providing access to 8 digital blocks and 12 analog blocks.

PSoC Core

The PSoC core is a powerful engine that supports a rich feature set. The core includes a CPU, memory, clocks, and configurable GPIOs.

The M8C CPU core is a powerful processor with speeds up to 24 MHz, providing a 4 million instructions per second MIPS 8-bit Harvard-architecture microprocessor. The CPU uses an interrupt controller with 17 vectors, to simplify programming of real-time embedded events. Program execution is timed and protected using the included sleep and watchdog timers WDT .

Memory uses 16 KB of flash for program storage, 256 bytes of SRAM for data storage, and up to 2 KB of EEPROM emulated using the flash. Program flash uses four protection levels on blocks of 64 bytes, allowing customized software information protection IP .

The PSoC device incorporates flexible internal clock generators, including a 24 MHz internal main oscillator IMO accurate to over temperature and voltage. The 24 MHz IMO can also be doubled to 48 MHz for use by the digital system. A low-power 32 kHz internal low speed oscillator ILO is provided for the sleep timer and WDT. If crystal accuracy is desired, the kHz external crystal oscillator ECO is available for use as a real-time clock RTC and can optionally generate a crystal-accurate 24 MHz system clock using a PLL. The clocks, together with programmable clock dividers as a system resource , provide the flexibility to integrate almost any timing requirement into the PSoC device.

PSoC GPIOs provide connection to the CPU, and digital and analog resources of the device. Each pin’s drive mode may be selected from eight options, allowing great flexibility in external interfacing. Every pin also has the capability to generate a system interrupt on high level, low level, and change from last read.

Digital System

The digital system is composed of 16 digital PSoC blocks. Each block is an 8-bit resource that can be used alone or combined with other blocks to form 8-, 16-, 24-, and 32-bit peripherals, which are called user modules.

Figure Digital System Block Diagram

Port 7

Port6

Port5

Port4

Port3

Port2

Port1

Port 0

Digital Clocks From Core

To System Bus To Analog System

DIGITAL SYSTEM

Digital PSoC Block Array

Row 0

DBB00

DBB01

DCB02

DCB03 4

Row Input Configuration

Row 1

DBB10

DBB11

DCB12

DCB13 4

Row Output Configuration
For up-to-date ordering, packaging, and electrical specification information, see the latest PSoC device datasheets on the web.

Application Notes

Cypress application notes are an excellent introduction to the wide variety of possible PSoC designs.

Development Kits

PSoC Development Kits are available online from and through a growing number of regional and global distributors, which include Arrow, Avnet, Digi-Key, Farnell, Future Electronics, and Newark.

Training

Free PSoC technical training on demand, webinars, and workshops , which is available online via covers a wide variety of topics and skill levels to assist you in your designs.

Development Tools
• Application editor graphical user interface GUI for device and user module configuration and dynamic reconfiguration
• Extensive user module catalog
• Integrated source-code editor C and assembly
• Free C compiler with no size restrictions or time limits
• Built-in debugger
• In-circuit emulation
• Built-in support for communication interfaces Hardware and software I2C slaves and masters Full-speed USB Up to four full-duplex universal asynchronous receiver/transmitters UARTs , SPI master and slave, and wireless

PSoC Designer supports the entire library of PSoC 1 devices and runs on Windows XP, Windows Vista, and Windows

CYPros Consultants Certified PSoC Consultants offer everything from technical assistance to completed PSoC designs. To contact or become a PSoC Consultant go to the CYPros Consultants web site.

Solutions Library Visit our growing library of solution focused designs. Here you can find various application designs that include firmware and hardware design files that enable you to complete your designs quickly.

Technical Support Technical support including a searchable Knowledge Base articles and technical forums is also available online. If you cannot find an answer to your question, call our Technical Support hotline at

PSoC Designer Software Subsystems

Design Entry In the chip-level view, choose a base device to work with. Then select different onboard analog and digital components that use the PSoC blocks, which are called user modules. Examples of user modules are analog-to-digital converters ADCs , digital-to-analog converters DACs , amplifiers, and filters. Configure the user modules for your chosen application and connect them to each other and to the proper pins. Then generate your project. This prepopulates your project with APIs and libraries that you can use to program your application. The tool also supports easy development of multiple configurations and dynamic reconfiguration. Dynamic reconfiguration makes it possible to change configurations at run time. In essence, this allows you to use more than 100 percent of PSoC's resources for an application.

Code Generation Tools The code generation tools work seamlessly within the PSoC Designer interface and have been tested with a full range of debugging tools. You can develop your design in C, assembly, or a combination of the two. Assemblers. The assemblers allow you to merge assembly code seamlessly with C code. Link libraries automatically use absolute addressing or are compiled in relative mode, and linked with other software modules to get absolute addressing. C Language Compilers. C language compilers are available that support the PSoC family of devices. The products allow you to create complete C programs for the PSoC family devices. The optimizing C compilers provide all of the features of C, tailored to the PSoC architecture. They come complete with embedded libraries providing port and bus operations, standard keypad and display support, and extended math functionality.

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Debugger

PSoC Designer has a debug environment that provides hardware in-circuit emulation, allowing you to test the program in a physical system while providing an internal view of the PSoC device. Debugger commands allow you to read and program and read and write data memory, and read and write I/O registers. You can read and write CPU registers, set and clear breakpoints, and provide program run, halt, and step control. The debugger also allows you to create a trace buffer of registers and memory locations of interest.

Online Help System

The online help system displays online, context-sensitive help. Designed for procedural and quick reference, each functional subsystem has its own context-sensitive help. This system also provides tutorials and links to FAQs and an Online Support Forum to aid the designer.

Designing with PSoC Designer

The development process for the device differs from that of a traditional fixed function microprocessor. The configurable analog and digital hardware blocks give the PSoC architecture a unique flexibility that pays dividends in managing specification change during development and by lowering inventory costs. These configurable resources, called PSoC Blocks, have the ability to implement a wide variety of user-selectable functions. The PSoC development process is summarized in four steps:

Select User Modules.

Configure user modules.

Organize and connect.

Generate, verify, and debug.

Select User Modules

PSoC Designer provides a library of prebuilt, pretested hardware peripheral components called “user modules.” User modules make selecting and implementing peripheral devices, both analog and digital, simple.

Configure User Modules

Each user module that you select establishes the basic register settings that implement the selected function. They also provide parameters and properties that allow you to tailor their precise configuration to your particular application. For example, a pulse width modulator PWM User Module configures one or more digital PSoC blocks, one for each 8 bits of resolution. The user module parameters permit you to establish the pulse width and duty cycle. Configure the parameters and properties to correspond to your chosen application. Enter values directly or by selecting values from drop-down menus. All the user modules are documented in datasheets that may be viewed directly in PSoC Designer or on the Cypress website. These user module datasheets explain the internal operation of the user module and provide performance specifications. Each datasheet describes the use of each user module parameter, and other information you may need to successfully implement your design.

In-Circuit Emulator A low-cost, high-functionality In-Circuit Emulator ICE is available for development support. This hardware can program single devices. The emulator consists of a base unit that connects to the PC using a USB port. The base unit is universal and operates with all PSoC devices. Emulation pods for each device family are available separately. The emulation pod takes the place of the PSoC device in the target board and performs full-speed 24 MHz operation.

Organize and Connect You build signal chains at the chip level by interconnecting user modules to each other and the I/O pins. You perform the selection, configuration, and routing so that you have complete control over all on-chip resources.
Notes Flex-Pod kit includes a practice flex-pod and a practice PCB, in addition to two flex-pods. Foot kit includes surface mount feet that can be soldered to the target PCB. Programming adapter converts non-DIP package to DIP footprint. Specific details and ordering information for each of the adapters can be found at

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Ordering Information
The following table lists the CY8C29x66 PSoC device’s key package features and ordering codes.
Package Ordering

Code Flash KB RAM KB Switch Mode Pump Temperature Range Digital PSoC Blocks Analog PSoC Blocks Digital I/O Pins Analog Inputs Analog Outputs XRES Pin
28-pin 300-mil DIP 28-pin 210-mil SSOP 28-pin 210-mil SSOP Tape and Reel 28-pin 300-mil SOIC 28-pin 300-mil SOIC Tape and Reel 44-pin TQFP 44-pin TQFP Tape and Reel 48-pin 300-mil SSOP 48-pin 300-mil SSOP Tape and Reel 48-Pin QFN 100-Pin TQFP 100-Pin OCD TQFP[28] 48-Pin 7 x 7 x mm QFN Sawn 48-Pin 7 x 7 x mm QFN Sawn

CY8C29466-24PXI
32 2 Yes °C to +85 °C 16

CY8C29466-24PVXI 32 2 Yes °C to +85 °C 16

CY8C29466-24PVXIT 32 2 Yes °C to +85 °C 16

CY8C29466-24SXI
32 2 Yes °C to +85 °C 16

CY8C29466-24SXIT 32 2 Yes °C to +85 °C 16

CY8C29566-24AXI
32 2 Yes °C to +85 °C 16

CY8C29566-24AXIT 32 2 Yes °C to +85 °C 16

CY8C29666-24PVXI 32 2 Yes °C to +85 °C 16

CY8C29666-24PVXIT 32 2 Yes °C to +85 °C 16

CY8C29666-24LFXI 32 2 Yes °C to +85 °C 16

CY8C29866-24AXI
32 2 Yes °C to +85 °C 16

CY8C29000-24AXI
32 2 Yes °C to +85 °C 16

CY8C29666-24LTXI 32 2 Yes °C to +85 °C 16

CY8C29666-24LTXIT 32 2 Yes °C to +85 °C 16
24 12
24 12
24 12
24 12
24 12
40 12
40 12
44 12
44 12
44 12
64 12
64 12
44 12
44 12

Note For Die sales information, contact a local Cypress sales office or field applications engineer FAE .
Ordering Code Definitions

CY 8 C 29 xxx-SPxx

Package Type PX = PDIP Pb-free SX = SOIC Pb-free PVX = SSOP Pb-free LFX/LKX/LTX/LQX/LCX = QFN Pb-free AX = TQFP Pb-free

Thermal Rating C = Commercial I = Industrial E = Extended

Speed 24 MHz

Family Code

Technology Code C = CMOS

Marketing Code 8 = Cypress PSoC

Company ID CY = Cypress
4 Yes 4 Yes 4 Yes 4 Yes 4 Yes 4 Yes 4 Yes 4 Yes 4 Yes 4 Yes 4 Yes 4 Yes 4 Yes
4 Yes

Note This part may be used for in-circuit debugging. It is NOT available for production.

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Acronyms

Acronyms Used Table 43 lists the acronyms that are used in this document.

Table Acronyms Used in this Datasheet

Acronym AC ADC API

CMOS CPU CRC CT DAC DC DTMF ECO EEPROM

GPIO ICE IDE ILO IMO I/O IrDA ISSP LCD LED LPC

LVD MAC MCU

Description alternating current analog-to-digital converter application programming interface complementary metal oxide semiconductor central processing unit cyclic redundancy check continuous time digital-to-analog converter direct current dual-tone multi-frequency external crystal oscillator electrically erasable programmable read-only memory general purpose I/O in-circuit emulator integrated development environment internal low speed oscillator internal main oscillator input/output infrared data association in-system serial programming liquid crystal display light-emitting diode low power comparator
low voltage detect multiply-accumulate microcontroller unit

Acronym MIPS OCD PCB PDIP PGA PLL POR PPOR PRS PWM QFN

RTC SAR SC SMP SOIC SPI SRAM SROM SSOP TQFP UART

USB WDT XRES

Description million instructions per second on-chip debug printed circuit board plastic dual-in-line package programmable gain amplifier phase-locked loop power on reset precision power on reset pseudo-random sequence Programmable System-on-Chip pulse width modulator quad flat no leads
real time clock successive approximation switched capacitor switch mode pump small-outline integrated circuit serial peripheral interface static random access memory supervisory read only memory shrink small-outline package thin quad flat pack universal asynchronous reciever / transmitter universal serial bus watchdog timer external reset

Reference Documents

CY8CPLC20, CY8CLED16P01, CY8C29x66, CY8C27x43, CY8C24x94, CY8C24x23, CY8C24x23A, CY8C22x13, CY8C21x34, CY8C21x23, CY7C64215, CY7C603xx, CY8CNP1xx, and CYWUSB6953 Programmable System-on-Chip Technical Reference Manual TRM 001-14463 Design Aids Reading and Writing Flash - AN2015 001-40459 Adjusting Trims for V and V Operation AN2012 001-17397

Understanding Datasheet Jitter Specifications for Cypress Timing Products AN5054 001-14503

Application Notes for Surface Mount Assembly of Amkor's MicroLeadFrame MLF Packages available at

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Document Conventions

Units of Measure Table 44 lists the unit sof measures. Table Units of Measure

Symbol dB °C fF pF kHz MHz rt-Hz kΩ Ω µA mA nA pA µs
decibels degree Celsius femto farad picofarad kilohertz megahertz root hertz kilohm ohm microampere milliampere nanoampere pikoampere microsecond

Unit of Measure
07/29/08 Added note to Ordering Information
*K 2708295
04/22/2009 Changed title from “CY8C29466, CY8C29566, CY8C29666, and

CY8C29866 PSoC Mixed Signal Array Final datasheet” to “CY8C29466, CY8C29566, CY8C29666, and CY8C29866 Programmable

System-on-Chip ” Updated to datasheet template Added 48-Pin QFN Sawn package diagram and CY8C29666-24LTXI and
CY8C29666-24LTXIT part details in the Ordering Information table Updated DC GPIO, AC Chip-Level, and AC Programming Specifications as
follows Modified FIMO6 page 27 , TWRITE specifications page 34 Added IOH page 21 , IOL page 21 , DCILO page 28 , F32K_U page 27 , TPOWERUP page 28 , TERASEALL page 34 , TPROGRAM_HOT page 34 , and TPROGRAM_COLD page 34 specifications
2761941 DRSW/AESA 09/10/2009 Added SRPOWER_UP parameter in AC specs table..
*M 2842762

DRSW
01/08/2010 Corrected Notes for VDD parameter in Table 13, “DC Chip-Level Specifications,” on page

Added “Contents” on page

Updated links in Sales, Solutions, and Legal Information.

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Document Title CY8C29466, CY8C29566, CY8C29666, CY8C29866 Programmable System-on-Chip Document Number 38-12013

Origin of Change

Submission Date

Description of Change
*N 2902396
03/30/2010 Updated Digital System Block Diagram and content in Digital System

Updated Cypress website links.

Removed reference to PSoC Designer in PSoC Designer Software

Subsystems

Added TBAKETEMP and TBAKETIME parameters in Absolute Maximum Ratings

Updated AC Chip-Level Specifications

Changed unit for SPIS function to ns in AC Digital Block Specifications

Updated notes in Packaging Information and package diagrams.

Updated Solder Reflow Peak Temperature

Updated Emulation and Programming Accessories

Removed Third Party Tools and Build a PSoC Emulator into Your Board.
Updated Ordering Information and Ordering Code Definitions.
*O 2940410
05/31/2010 Updated content to match current style guide and datasheet template.

No technical updates.
*P 3044869
10/01/2010 Added PSoC Device Characteristics table

Added DC I2C Specifications table.

Added F32K_U max limit. Added Tjit_IMO specification, removed existing jitter specifications.

Updated Analog reference tables.

Updated Units of Measure, Acronyms, Glossary, and References sections.

Updated solder reflow specifications.

No specific changes were made to AC Digital Block Specifications table and I2C Timing Diagram. They were updated for clearer understanding.

Updated Figure 13 since the labelling for y-axis was incorrect.

Template and styles update.

Removed footnote reference for “Solder Reflow Peak Temperature” table.

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Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations.

Products Automotive Clocks & Buffers Interface Lighting & Power Control

Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF
cypress.com/go/automotive cypress.com/go/clocks
cypress.com/go/interface cypress.com/go/powerpsoc
cypress.com/go/plc cypress.com/go/memory
cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB
cypress.com/go/wireless

PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

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PSoC Designer and Programmable System-on-Chip are trademarks and are registered trademarks of Cypress Semiconductor Corporation. Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semiconductors. All products and company names mentioned in this document may be the trademarks of their respective holders.
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Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY8C29666-24LFXIT Datasheet file may be downloaded here without warranties.

Datasheet ID: CY8C29666-24LFXIT 508164