CY7C1311CV18, CY7C1911CV18 CY7C1313CV18, CY7C1315CV18
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CY7C1311CV18-200BZC (pdf) |
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CY7C1311CV18-250BZC |
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CY7C1311CV18, CY7C1911CV18 CY7C1313CV18, CY7C1315CV18 18-Mbit QDR -II SRAM 4-Word Burst Architecture • Separate independent read and write data ports Supports concurrent transactions • 300 MHz clock for high bandwidth • 4-word burst for reducing address bus frequency • Double Data Rate DDR interfaces on both read and write ports data transferred at 600 MHz at 300 MHz • Two input clocks K and K for precise DDR timing SRAM uses rising edges only • Two input clocks for output data C and C to minimize clock skew and flight time mismatches • Echo clocks CQ and CQ simplify data capture in high-speed systems • Single multiplexed address input bus latches address inputs for both read and write ports • Separate port selects for depth expansion • Synchronous internally self-timed writes • QDR -II operates with cycle read latency when the Delay Lock Loop DLL is enabled • Operates as a QDR-I device with 1 cycle read latency in DLL off mode • Available in x 8, x 9, x 18, and x 36 configurations • Full data coherency, providing most current data • Core VDD = ±0.1V IO VDDQ = 1.4V to VDD • Available in 165-Ball FBGA package 13 x 15 x mm • Offered in both Pb-free and non Pb-free packages • Variable drive HSTL output buffers • JTAG compatible test access port • Delay Lock Loop DLL for accurate data placement Configurations CY7C1311CV18 2M x 8 CY7C1911CV18 2M x 9 CY7C1313CV18 1M x 18 CY7C1315CV18 512K x 36 Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR -II architecture. QDR-II architecture consists of two separate ports the read port and the write port to access the memory array. The read port has dedicated data outputs to support read operations and the write port has dedicated data inputs to support write operations. QDR-II architecture has separate data inputs and data outputs to completely eliminate the need to “turn-around” the data bus required with common IO devices. Access to each port is accomplished through a common address bus. Addresses for read and write addresses are latched on alternate rising edges of the input K clock. Accesses to the QDR-II read and write ports are completely independent of one another. In order to maximize data throughput, both read and write ports are provided with DDR interfaces. Each address location is associated with four 8-bit words CY7C1311CV18 or 9-bit words CY7C1911CV18 or 18-bit words CY7C1313CV18 or 36-bit words CY7C1315CV18 that burst sequentially into or out of the device. Because data can be transferred into and out of the device on every rising edge of both input clocks K and K and C and C , memory bandwidth is maximized while simplifying system design by eliminating bus “turn-arounds”. Depth expansion is accomplished with port selects, which enables each port to operate independently. All synchronous inputs pass through input registers controlled by the K or K input clocks. All data outputs pass through output registers controlled by the C or C or K or K in a single clock domain input clocks. Writes are conducted with on-chip synchronous self-timed write circuitry. Selection Guide Description Maximum Operating Frequency Maximum Operating Current 300 MHz 278 MHz 278 720 730 760 910 250 MHz 250 665 675 705 830 200 MHz 200 560 570 590 675 167 MHz 167 495 490 505 570 Unit MHz mA • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Logic Block Diagram CY7C1311CV18 CY7C1311CV18, CY7C1911CV18 CY7C1313CV18, CY7C1315CV18 D[7:0] A 18:0 19 Ordering Information Not all of the speed, package, and temperature ranges are available. Please contact your local sales representative or visit for actual products offered. Speed MHz Ordering Code Package Diagram Package Type Operating Range 300 CY7C1311CV18-300BZC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Commercial CY7C1911CV18-300BZC CY7C1313CV18-300BZC CY7C1315CV18-300BZC CY7C1311CV18-300BZXC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Pb-Free CY7C1911CV18-300BZXC CY7C1313CV18-300BZXC CY7C1315CV18-300BZXC CY7C1311CV18-300BZI 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Industrial CY7C1911CV18-300BZI CY7C1313CV18-300BZI CY7C1315CV18-300BZI CY7C1311CV18-300BZXI 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Pb-Free CY7C1911CV18-300BZXI CY7C1313CV18-300BZXI CY7C1315CV18-300BZXI 278 CY7C1311CV18-278BZC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Commercial CY7C1911CV18-278BZC CY7C1313CV18-278BZC CY7C1315CV18-278BZC CY7C1311CV18-278BZXC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Pb-Free CY7C1911CV18-278BZXC CY7C1313CV18-278BZXC CY7C1315CV18-278BZXC CY7C1311CV18-278BZI 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Industrial CY7C1911CV18-278BZI Ordering Information continued Not all of the speed, package, and temperature ranges are available. Please contact your local sales representative or visit for actual products offered. Speed MHz Ordering Code Package Diagram Package Type Operating Range 250 CY7C1311CV18-250BZC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Commercial CY7C1911CV18-250BZC CY7C1313CV18-250BZC CY7C1315CV18-250BZC CY7C1311CV18-250BZXC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Pb-Free CY7C1911CV18-250BZXC CY7C1313CV18-250BZXC CY7C1315CV18-250BZXC CY7C1311CV18-250BZI 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Industrial CY7C1911CV18-250BZI CY7C1313CV18-250BZI CY7C1315CV18-250BZI CY7C1311CV18-250BZXI 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Pb-Free CY7C1911CV18-250BZXI CY7C1313CV18-250BZXI CY7C1315CV18-250BZXI 200 CY7C1311CV18-200BZC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Commercial CY7C1911CV18-200BZC CY7C1313CV18-200BZC CY7C1315CV18-200BZC CY7C1311CV18-200BZXC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Pb-Free CY7C1911CV18-200BZXC CY7C1313CV18-200BZXC CY7C1315CV18-200BZXC CY7C1311CV18-200BZI 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Industrial CY7C1911CV18-200BZI Ordering Information continued Not all of the speed, package, and temperature ranges are available. Please contact your local sales representative or visit for actual products offered. Speed MHz Ordering Code Package Diagram Package Type Operating Range 167 CY7C1311CV18-167BZC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Commercial CY7C1911CV18-167BZC CY7C1313CV18-167BZC CY7C1315CV18-167BZC CY7C1311CV18-167BZXC 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Pb-Free CY7C1911CV18-167BZXC CY7C1313CV18-167BZXC CY7C1315CV18-167BZXC CY7C1311CV18-167BZI 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Industrial CY7C1911CV18-167BZI CY7C1313CV18-167BZI CY7C1315CV18-167BZI CY7C1311CV18-167BZXI 51-85180 165-Ball Fine Pitch Ball Grid Array 13 x 15 x mm Pb-Free CY7C1911CV18-167BZXI CY7C1313CV18-167BZXI CY7C1315CV18-167BZXI Page 29 of 31 [+] Feedback CY7C1311CV18, CY7C1911CV18 CY7C1313CV18, CY7C1315CV18 Package Diagram Figure 165-Ball FBGA 13 x 15 x mm , 51-85180 TOP VIEW PIN 1 CORNER 1 2 3 4 5 6 7 8 9 10 11 A B C D E F G H J K L M N P R SEATING PLANE C MAX. C BOTTOM VIEW PIN 1 CORNER M C M C A B - 01.0665X 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P R 0.15 4X |
More datasheets: B66337G0000X187 | B66337G0100X127 | B66337G1000X127 | B66337G0500X127 | B66337G0250X127 | 3575 | A000138 | 1185 | ADNK-7053-ND24 | FDA79N15 |
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