CY29949AXIT

CY29949AXIT Datasheet

CY29949

Part	Datasheet
CY29949AXIT	CY29949AXIT (pdf)

Related Parts	Information
CY29949AXC	CY29949AXC
CY29949AXCT	CY29949AXCT
CY29949AXI	CY29949AXI

PDF Datasheet Preview
CY29949 2.5V or 3.3V 200 MHz 1:15 Clock Distribution Buffer • 2.5V or 3.3V operation • 200-MHz clock support • LVPECL or LVCMOS/LVTTL clock input • LVCMOS/LVTTL compatible outputs • 15 clock outputs drive up to 30 clock lines • 1X and 1/2X configurable outputs • Output three-state control • 350 ps maximum output-to-output skew • Pin compatible with MPC949, MPC9449 • Available in Commercial and Industrial temperature range • 52-pin TQFP package The CY29949 is a low voltage 200 MHz clock distribution buffer with the capability to select either a differential LVPECL or LVCMOS/LVTTL compatible input clocks. These clock sources are used to provide for test clocks and primary system clocks. All other control inputs are LVCMOS/LVTTL compatible. The 15 outputs are LVCMOS or LVTTL compatible and can drive 50Ω series or parallel terminated transmission lines. For series terminated transmission lines, each output can drive one or two traces giving the device an effective fanout of The CY29949 is capable of generating 1X and 1/2X signals from a 1X source. These signals are generated and retimed internally to ensure minimal skew between the 1X and 1/2X signals. SEL A:D inputs allow flexibility in selecting the ratio of 1X to1/2X outputs. The CY29949 outputs can also be three-stated via the MR/OE# input. When MR/OE# is set HIGH, it resets the internal flip-flops and three-states the outputs. Logic Block Diagram TCLK_SEL PECL_CLK PECL_CLK# PECL_SEL DSELA DSELB DSELC DSELD MR/OE# 2 QA 0:1 3 QB 0:2 4 QC 0:3 6 QD 0:5 • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Pin Configuration Figure Pin Diagram - CY29949 NC VDDC QB2 VSS QB1 VDDC QB0 VSS QA1 VDDC QA0 VSS MR/OE# TCLK_SEL VDD TCLK0 TCLK1 PECL_CLK# PCLK_SEL DSELA DSELB DSELC DSELD 52 51 50 49 48 47 46 45 44 43 42 41 40 7 CY29949 33 14 15 16 17 18 19 20 21 22 23 24 25 26 NC VSS QC0 VDDC QC1 VSS QC2 VDDC QC3 VSS QD5 NC CY29949 NC VDDC QD4 VSS QD3 VDDC QD2 VSS QD1 VDDC QD0 VSS NC Pin Description Name PECL_CLK PECL_CLK# TCLK 0,1 49, 51 QA 1,0 42, 44, 46 QB 2:0 31, 33, 35, 37 QC 3:0 Ordering Information Part Number CY29949AXI CY29949AXIT CY29949AXC CY29949AXCT Package Type 52-Pin TQFP 52-Pin TQFP - Tape and Reel 52-Pin TQFP 52-Pin TQFP - Tape and Reel Production Flow Industrial, to +85°C Industrial, to +85°C Commercial, 0°C to +70°C Commercial, 0°C to +70°C Package Drawing and Dimensions Figure 52-Pin Thin Plastic Quad Flat Pack 10 x 10 x mm A52B 51-85158-** Page 6 of 7 [+] Feedback CY29949 Document History Page Document Title CY29949 2.5V or 3.3V 200 MHz 1:15 Clock Distribution Buffer Document Number 38-07289 ECN No. Submission Date Orig. of Change Description of Change 111100 02/01/02 BRK New data sheet 116783 08/14/02 HWT Added commercial temperature range to the Ordering Information table 118463 09/09/02 HWT Corrected the package diagram from 52 LQFP to 52 TQFP 122881 12/22/02 Added power-up requirements to Maximum Ratings 130132 11/07/03 RGL Fixed block diagram and MR/OE# description in the Pin Description table 2595534 10/23/08 CXQ/PYRS Changed to Pb-Free device code in Ordering Information Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General psoc.cypress.com/solutions Low Power/Low Voltage psoc.cypress.com/low-power Precision Analog psoc.cypress.com/precision-analog LCD Drive psoc.cypress.com/lcd-drive CAN 2.0b psoc.cypress.com/can psoc.cypress.com/usb Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 7 of 7 [+] Feedback

PDF Datasheet Preview

CY29949
2.5V or 3.3V 200 MHz 1:15 Clock Distribution Buffer
• 2.5V or 3.3V operation
• 200-MHz clock support
• LVPECL or LVCMOS/LVTTL clock input
• LVCMOS/LVTTL compatible outputs
• 15 clock outputs drive up to 30 clock lines
• 1X and 1/2X configurable outputs
• Output three-state control
• 350 ps maximum output-to-output skew
• Pin compatible with MPC949, MPC9449
• Available in Commercial and Industrial temperature range
• 52-pin TQFP package

The CY29949 is a low voltage 200 MHz clock distribution buffer with the capability to select either a differential LVPECL or LVCMOS/LVTTL compatible input clocks. These clock sources are used to provide for test clocks and primary system clocks. All other control inputs are LVCMOS/LVTTL compatible. The 15 outputs are LVCMOS or LVTTL compatible and can drive 50Ω series or parallel terminated transmission lines. For series terminated transmission lines, each output can drive one or two traces giving the device an effective fanout of

The CY29949 is capable of generating 1X and 1/2X signals from a 1X source. These signals are generated and retimed internally to ensure minimal skew between the 1X and 1/2X signals. SEL A:D inputs allow flexibility in selecting the ratio of 1X to1/2X outputs.

The CY29949 outputs can also be three-stated via the MR/OE# input. When MR/OE# is set HIGH, it resets the internal flip-flops and three-states the outputs.

Logic Block Diagram

TCLK_SEL

PECL_CLK

PECL_CLK#

PECL_SEL

DSELA

DSELB

DSELC

DSELD MR/OE#
2 QA 0:1 3 QB 0:2 4 QC 0:3 6 QD 0:5
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

Pin Configuration

Figure Pin Diagram - CY29949

NC VDDC

QB2 VSS QB1 VDDC QB0 VSS QA1 VDDC QA0 VSS

MR/OE# TCLK_SEL

VDD TCLK0 TCLK1 PECL_CLK# PCLK_SEL DSELA DSELB DSELC DSELD
52 51 50 49 48 47 46 45 44 43 42 41 40
7 CY29949 33
14 15 16 17 18 19 20 21 22 23 24 25 26

NC VSS QC0 VDDC QC1 VSS QC2 VDDC QC3 VSS QD5 NC

CY29949

NC VDDC QD4 VSS QD3 VDDC QD2 VSS QD1 VDDC QD0 VSS NC

Pin Description

Name

PECL_CLK

PECL_CLK#

TCLK 0,1
49, 51

QA 1,0
42, 44, 46

QB 2:0
31, 33, 35, 37

QC 3:0
Ordering Information

Part Number CY29949AXI CY29949AXIT CY29949AXC CY29949AXCT

Package Type 52-Pin TQFP 52-Pin TQFP - Tape and Reel 52-Pin TQFP 52-Pin TQFP - Tape and Reel

Production Flow Industrial, to +85°C Industrial, to +85°C Commercial, 0°C to +70°C Commercial, 0°C to +70°C

Package Drawing and Dimensions

Figure 52-Pin Thin Plastic Quad Flat Pack 10 x 10 x mm A52B
51-85158-**

Page 6 of 7 [+] Feedback

CY29949

Document History Page

Document Title CY29949 2.5V or 3.3V 200 MHz 1:15 Clock Distribution Buffer Document Number 38-07289

ECN No.

Submission Date

Orig. of Change

Description of Change
111100 02/01/02

BRK New data sheet
116783 08/14/02
HWT Added commercial temperature range to the Ordering Information table
118463 09/09/02

HWT Corrected the package diagram from 52 LQFP to 52 TQFP
122881 12/22/02

Added power-up requirements to Maximum Ratings
130132 11/07/03

RGL Fixed block diagram and MR/OE# description in the Pin Description table
2595534 10/23/08 CXQ/PYRS Changed to Pb-Free device code in Ordering Information

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

PSoC Solutions

General
psoc.cypress.com/solutions

Low Power/Low Voltage
psoc.cypress.com/low-power

Precision Analog
psoc.cypress.com/precision-analog

LCD Drive
psoc.cypress.com/lcd-drive

CAN 2.0b
psoc.cypress.com/can
psoc.cypress.com/usb

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All products and company names mentioned in this document may be the trademarks of their respective holders.

Page 7 of 7
[+] Feedback

More datasheets: 5962-9232404MXA | 5962-9232404MYA | 8414NGH | MUC-20PFFR-JS8C01 | MUC-20PFFR-JS7001 | 3556 | M39139 SL002 | M39139 SL001 | M39139 SL005 | AW56P7218BKK0M

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY29949AXIT Datasheet file may be downloaded here without warranties.

Datasheet ID: CY29949AXIT 507744