AW56P7218BKK0M

AW56P7218BKK0M Datasheet

ATP AW56P7218BKK0M

Part	Datasheet
AW56P7218BKK0M	AW56P7218BKK0M (pdf)

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Electronics, Inc. 2590 North First Street, San Jose, CA 95131, U.S.A. Tel 408-732-5000 Fax 408-732-5055 ATP AW56P7218BKK0M 2GB DDR3- 1600 UNBUFFERED ECC SODIMM DESCRIPTION The ATP AW56P7218BKK0M is a high performance 2GB DDR3-1600 Unbuffered ECC SODIMM SDRAM memory module. It is organized as 256M x 72 in a 204-pin Small Outline Dual-In-Line Memory Module SODIMM package. The module utilizes nine 256Mx8 DDR3 SDRAMs in FBGA package. The module consists of a 256-byte serial EEPROM, which contains the module configuration information. KEY FEATURES • High Density 2GB 256M x 72 • DIMM Rank 1 Rank • Cycle Time 1.25ns 800MHz • CAS Latency 11 • Power supply 1.35V 1.28V~1.45V Backward compatible to 1.5V ±0.075V • Internal self calibration through ZQ • On-board I2C temperature sensor with integrated SPD EEPROM • Burst lengths 8 • Auto & Self refresh • Minimum Thickness of Golden Finger 30 Micro-inch • Asynchronous Reset • refresh interval at lower than TCASE 85°C, refresh interval at 85°C < TCASE < 95 °C • Dynamic On Die Termination • Fly-by topology • PCB Height inches • RoHS compliant Part No. AW56P7218BKK0M Max Freq 800MHz x2 Interface SSTL_15 PIN DESCRIPTION Pin Name A0~A9, A11~A14 A10/AP Address Inputs Address Input/Auto precharge BA0~BA2 SDRAM Bank Address CAS CK0~CK1 CK0 ~ CK1 CKE0 DM0~DM8 DQ0~DQ63 DQS0~DQS8 Column Address Strobe Clock Inputs, positive line Clock Inputs, negative line Clock Enables Data Masks Data Input/Output Data strobes DQS0 ~ DQS8 VREFDQ VREFCA A12/ BC VTT CB0~CB7 Data strobes, negative line Input/Output Reference Address Input/Burst chop Termination voltage DIMM ECC Check bits Your Ultimate Memory Solution! Pin Name ODT0 RAS CS0 SA0~SA1 SCL SDA VDD VDDSPD VSS RESET WE Event NC TEST On die termination Row Address Strobe Chip Selects SPD address Serial Presence Detect SPD Clock Input SPD Data Input/Output Core Power SPD Power Ground This signal resets the DDR3 SDRAM Write Enable Temperature sensor Event output No Connect Logic Analyzer specific test pin No connect on SO-DIMM Page 1 of 7 ATP AW56P7218BKK0M

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Electronics, Inc.
2590 North First Street, San Jose, CA 95131, U.S.A.

Tel 408-732-5000 Fax 408-732-5055

ATP AW56P7218BKK0M
2GB DDR3- 1600 UNBUFFERED ECC SODIMM

DESCRIPTION The ATP AW56P7218BKK0M is a high performance 2GB DDR3-1600 Unbuffered ECC SODIMM SDRAM memory module. It is organized as 256M x 72 in a 204-pin Small Outline Dual-In-Line Memory Module SODIMM package. The module utilizes nine 256Mx8 DDR3 SDRAMs in FBGA package. The module consists of a 256-byte serial EEPROM, which contains the module configuration information.

KEY FEATURES
• High Density 2GB 256M x 72
• DIMM Rank 1 Rank
• Cycle Time 1.25ns 800MHz
• CAS Latency 11
• Power supply 1.35V 1.28V~1.45V

Backward compatible to 1.5V ±0.075V
• Internal self calibration through ZQ
• On-board I2C temperature sensor with
integrated SPD EEPROM
• Burst lengths 8
• Auto & Self refresh
• Minimum Thickness of Golden Finger 30 Micro-inch
• Asynchronous Reset
• refresh interval at lower than TCASE
85°C, refresh interval at 85°C < TCASE < 95 °C
• Dynamic On Die Termination
• Fly-by topology
• PCB Height inches
• RoHS compliant

Part No. AW56P7218BKK0M

Max Freq 800MHz x2

Interface SSTL_15

PIN DESCRIPTION

Pin Name

A0~A9, A11~A14 A10/AP

Address Inputs Address Input/Auto precharge

BA0~BA2

SDRAM Bank Address

CAS CK0~CK1 CK0 ~ CK1 CKE0 DM0~DM8 DQ0~DQ63 DQS0~DQS8

Column Address Strobe Clock Inputs, positive line Clock Inputs, negative line

Clock Enables Data Masks Data Input/Output Data strobes

DQS0 ~ DQS8 VREFDQ VREFCA

A12/ BC VTT CB0~CB7

Data strobes, negative line

Input/Output Reference Address Input/Burst chop Termination voltage DIMM ECC Check bits

Your Ultimate Memory Solution!

Pin Name

ODT0 RAS CS0 SA0~SA1 SCL SDA VDD VDDSPD VSS

RESET WE

Event NC

TEST

On die termination Row Address Strobe Chip Selects

SPD address Serial Presence Detect SPD Clock Input SPD Data Input/Output Core Power SPD Power Ground This signal resets the DDR3 SDRAM

Write Enable

Temperature sensor Event output No Connect

Logic Analyzer specific test pin No connect on SO-DIMM

Page 1 of 7

ATP AW56P7218BKK0M

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Datasheet ID: AW56P7218BKK0M 519562