CTSLV399
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CTSLV399NG (pdf) |
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CTSLV399TG |
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CTSLV399 LVPECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable MLP8, MSOP8 Not recommended for new designs Minimizes External Components Selectable Enable Polarity and Threshold CMOS or PECL 3V to 5.5V Power Supply Similar Operation as CTS100LVEL16VT Except with LVDS Outputs BLOCK DIAGRAM The CTSLV399 is a specialized oscillator gain stage with an LVDS output buffer including an enable. The selectable enable input allows continuous oscillator operation by only controlling the QHG HG outputs. The CTSLV399 provides adjustable internal pull-down current sources for the outputs. Internal input biasing further reduces the number of needed external components ENGINEERING NOTES The CTSLV399 is a specialized oscillator gain stage with LVDS output buffer including an enable. The enable input EN allows continuous oscillator operation by only controlling the QHG HG outputs. The CTSLV399 also provides a VBB and internal bias resistors from D to VBB and to VBB. The VBB pin can support mA sink/source current. Bypassing VBB to ground with a capacitor is recommended. Functionality MLP8 Package CTSLV399NG The MLP8, NG options of the CTSLV399, provide a PECL/ECL level enable input When the input is LOW, the and HG outputs pass data from the inputs. When is HIGH, the output continues to pass data while the QHG output is forced high and the HG output is forced low. Only the output operates with a current source 4 mA to VEE. This is accomplished by internal bonding of CS-SEL. An external resistor may also be used to increase pull-down current to a maximum of 25mA includes 4mA on-chip current source . The CTSLV399NB and CTSLV399ND versions operate with a single ended data input D . The input is internally bonded directly to the VBB pin bypassing the bias resistor. Functionality MLP8 Package CTSLV399N & MSOP8 Package CTSLV399T The MSOP8 T and MLP8 N versions of the CTSLV399 provide a CMOS/TTL level enable input EN . When the EN input is HIGH, the and HG outputs pass data from the inputs. When EN is LOW, the output continues to pass data while the QHG output is forced high and the HG output is forced low. Only the output operates with a current source 4 mA to VEE. This is accomplished by internal bonding of CS-SEL. An external resistor may also be used to increase pull-down current to a maximum of 25mA includes 4mA on-chip current source . The MSOP8 T and MLP8 N CTSLV399 operates with a single ended data input D . The input is internally bonded directly to the VBB pin bypassing the bias resistor. North Americas +1-800-757-6686 • International +1-508-435-6831 • Asia +65-655-17551 • Specifications are subject to change without notice. 1 CTSLV399 LVPECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable MLP8, MSOP8 Not recommended for new designs EN-SEL NC VEE1 1 2 Enable Truth Table EN/ EN PECL Low, VEE or NC Data Data Data PECL High or VCC Data High CMOS/TTL Low, VEE or NC Data CMOS/TTL High or VCC2 Data EN-SEL connections must be less than High Data PART ORDERING INFORMATION Part Number CTSLV399NG CTSLV399TG Package MLP8 MSOP8 Marking V1G / YWW HV99G / YYWW North Americas +1-800-757-6686 • International +1-508-435-6831 • Asia +65-655-17551 • Specifications are subject to change without notice. 10 |
More datasheets: 74F374MSA | 74F374SJX | 74F374SJ | 74F374SC | 74F374PC | 74F374SCX | A100N50X4A | 3082 | MSA-1110 | CTSLV399TG |
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