CTS100EL16VOTG
CTS100EL16VOTG Datasheet
CTS100EL16
| Part | Datasheet |
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CTS100EL16VOTG |
CTS100EL16VOTG (pdf) |
| Related Parts | Information |
|---|---|
CTS100EL16VONG |
CTS100EL16VONG |
CTS100EL16VOUG |
CTS100EL16VOUG |
| PDF Datasheet Preview |
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| CTS100EL16 LVPECL Oscillator Gain Stage & Buffer with Enable MLP8, MSOP8, MSOP10 250ps Propagation Delay High Voltage Gain vs. Standard EL16 Enable Pull-down Resistor High Bandwidth for -147 dBc/Hz Typical Noise Floor BLOCK DIAGRAM The CTS100EL16 is an oscillator gain stage with a high gain output buffer including an enable. The HG outputs have a voltage gain several times greater than the outputs. An enable input allows continuous oscillator operation. The can be controlled by ECL or CMOS signals ENGINEERING NOTES The CTS100EL16 is an oscillator gain stage with a high gain output buffer including an enable. The HG outputs have a voltage gain several times greater than the outputs. An allows continuous oscillator operation. When is LOW or floating NC , input data is passed to both sets of outputs. When is HIGH, the HG outputs will be forced LOW/HIGH respectively, while input data will continue to be passed to the outputs. The input can be driven with an ECL/PECL signal or a CMOS logic signal. The input impedance of the inputs remain constant for all operating modes since forcing the outputs via the pin does not power-down the chip but only disables the high gain HG outputs. Input protection diodes are included on the inputs for enhanced ESD protection. The CTS100EL16 also provides a VBB output that supports 1.5mA sink/source current. When used, the VBB pin should be bypassed to ground or VCC via a capacitor. Any used output must have an external pull down resistor. For 3.3V operation, an resistor to VEE is recommended if an AC coupled load is present. At 5.0V, a resistor is recommended for the AC load case. Alternately, a load terminated to VCC or the Thevenin equivalent may be driven directly. Unused outputs may be left floating NC . 10k temperature compensation is offered on the CTS100LVEL16V. If this mode is desired, connect the 10k pin to VEE. The connection must be less than NOTE Specifications in ECL/PECL tables are valid when thermal equilibrium is established. North America +1-800-757-6686 • International +1-508-435-6831 • Asia +65-655-17551 • Specifications are subject to change without notice. 1 CTS100EL16 LVPECL Oscillator Gain Stage & Buffer with Enable MLP8, MSOP8, MSOP10 D EN Q QHG Timing Diagram Enable Truth Table LOW or NC HIGH Data QHG Data LOW HG Data HIGH Application Circuit for CMOS Inputs North America +1-800-757-6686 • International +1-508-435-6831 • Asia +65-655-17551 • Specifications are subject to change without notice. 2 CTS100EL16 LVPECL Oscillator Gain Stage & Buffer with Enable MLP8, MSOP8, MSOP10 Recommended Component Values for CMOS Single Ended Inputs Input Type 3.3V CMOS 5.0V CMOS R11 Value AC Coupled C2 in DC Coupled C2 circuit PART ORDERING INFORMATION Part Number PN CTS100EL16VONG CTS100EL16VOTG CTS100EL16VOUG Package MLP8 MSOP8 MSOP10 CTS100EL100VOTG MSOP8 CTS100EL16VOUG MSOP10 Marking POG / YWW HVOG / YYWW HVOUG / YYWW North America +1-800-757-6686 • International +1-508-435-6831 • Asia +65-655-17551 • Specifications are subject to change without notice. 12 |
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