EP9302-CQZ

EP9302-CQZ Datasheet

EP9302 Data Sheet

Part	Datasheet
EP9302-CQZ	EP9302-CQZ (pdf)

Related Parts	Information
EP9302-IQZ	EP9302-IQZ

PDF Datasheet Preview
EP9302 Data Sheet • 200-MHz ARM920T Processor • 16-kbyte Instruction Cache • 16-kbyte Data Cache • CE-enabled MMU • 100-MHz System Bus • MaverickCrunch Math Engine • Floating point, Integer and Signal Processing Instructions • Optimized for digital music compression and decompression algorithms. • Hardware interlocks allow in-line coding. • MaverickKey IDs • 32-bit unique ID can be used for DRM-compliant, 128-bit random ID. • Integrated Peripheral Interfaces • 16-bit SDRAM Interface up to 4 banks • 16-bit SRAM / FLASH / ROM • Serial EEPROM Interface • 1/10/100 Mbps Ethernet MAC • Two UARTs • Two-port USB Full-speed Host OHCI 12 Mbits per second • IrDA Interface • ADC • Serial Peripheral Interface SPI Port High-speed ARM9 System-on-chip Processor with MaverickCrunch • 6-channel Serial Audio Interface I2S • 2-channel, Low-cost Serial Audio Interface AC'97 • Internal Peripherals • 12 Direct Memory Access DMA Channels • Real-time Clock with Software Trim • Dual PLL controls all clock domains. • Watchdog Timer • Two General-purpose 16-bit Timers • One General-purpose 32-bit Timer • One 40-bit Debug Timer • Interrupt Controller • Boot ROM • Package • 208-pin LQFP COMMUNICATIONS PORTS Serial Audio Interface 2 UARTs w/ IrDA 2 USB Hosts Ethernet MAC Peripheral Bus 12 Channel DMA M averickK eyTM Processor Bus Boot ROM MaverickCrunchTM ARM 920T D-Cache I-Cache 16KB 16KB Clocks & Timers Interrupts & GPIO Bus Bridge SRAM & Flash I/F Unified SDRAM I/F MEMORY AND STORAGE 2010 Cirrus Logic All Rights Reserved USER INTERFACE Mar ‘10 DS653F2 EP9302 High-speed ARM9 System-on-chip Processor with MaverickCrunch OVERVIEW The EP9302 is an ARM920T-based system-on-a-chip design with a large peripheral set targeted to a variety of applications: • Industrial controls • Digital media servers • Integrated home media gateways • Digital audio jukeboxes • Streaming audio players • Set-top boxes • Point-of-sale terminals • Thin clients • Biometric security systems • GPS & fleet management systems • Educational toys • Industrial computers • Industrial hand-held devices • Voting machines • Medical equipment The EP9302 is one of a series of ARM920T-based devices. Other members of the family have different peripheral sets, coprocessors and package configurations. The ARM920T microprocessor core with separate 16 kbyte, 64-way set-associative instruction and data caches is augmented by the MaverickCrunch coprocessor enabling faster than real-time compression of audio CDs. The MaverickKey unique hardware programmed IDs are a solution to the growing concern over secure web content and commerce. With Internet security playing an important role in the delivery of digital media such as books or music, traditional software methods are quickly becoming unreliable. The MaverickKey unique IDs provide OEMs with a method of utilizing specific hardware IDs such as those assigned for SDMI Secure Digital Music Initiative or any other authentication mechanism. A high-performance 1/10/100 Mbps Ethernet media access controller EMAC is included along with external interfaces to SPI, AC’97, and I2S audio. A two-port USB Full-speed Host OHCI 12 Mbits per second , two UARTs, and a analog voltage measurement analog-todigital converter ADC are included as well. The EP9302 is a high-performance, low-power RISCbased, single-chip computer built around an ARM920T microprocessor core with a maximum operating clock rate of 200 MHz 184 MHz for industrial conditions . The ARM core operates from a V supply, while the I/O operates at V with power usage between 100 mW and 750 mW dependent on speed . PP1 PP2 PP3 June 2004 July 2004 March 2005 February 2010 Ordering Information DS653F2 2010 Cirrus Logic All Rights Reserved EP9302 High-speed ARM9 System-on-chip Processor with MaverickCrunch List of Figures Figure Timing Diagram Drawing Key 13 Figure SDRAM Load Mode Register Cycle Timing Measurement 14 Figure SDRAM Burst Read Cycle Timing Measurement 15 Figure SDRAM Burst Write Cycle Timing Measurement 16 Figure SDRAM Auto Refresh Cycle Timing Measurement 17 Figure Static Memory Multiple Word Read 8-bit Cycle Timing Measurement 18 Figure Static Memory Multiple Word Write 8-bit Cycle Timing Measurement 19 Figure Static Memory Multiple Word Read 16-bit Cycle Timing Measurement 20 Figure Static Memory Multiple Word Write 16-bit Cycle Timing Measurement 21 Figure Static Memory Burst Read Cycle Timing Measurement 22 Figure Static Memory Burst Write Cycle Timing Measurement 23 Figure Static Memory Single Read Wait Cycle Timing Measurement 24 Figure Static Memory Single Write Wait Cycle Timing Measurement 25 Figure Static Memory Turnaround Cycle Timing Measurement 26 Figure Ethernet MAC Timing Measurement 28 Figure TI Single Transfer Timing Measurement 30 Figure Microwire Frame Format, Single Transfer 30 Figure SPI Format with SPH=1 Timing Measurement 31 Figure Inter-IC Sound I2S Timing Measurement 32 Figure AC ‘97 Configuration Timing Measurement 33 Figure ADC Transfer Function 34 Figure JTAG Timing Measurement 35 2010 Cirrus Logic All Rights Reserved DS653F2 EP9302 High-speed ARM9 System-on-chip Processor with MaverickCrunch List of Tables Table A. Change History 2 Table B. General Purpose Memory Interface Pin Assignments 6 Table C. Ethernet Media Access Controller Pin Assignments 7 Table D. Audio Interfaces Pin Assignment 7 Table E. 12-bit Analog-to-Digital Converter Pin Assignments 7 Table F. Universal Asynchronous Receiver/Transmitters Pin Assignments 8 Table G. Dual Port USB Host Pin Assignments 8 Table H. Two-Wire Port with EEPROM Support Pin Assignments 8 Table I. Real-Time Clock with Pin Assignments 8 Table J. PLL and Clocking Pin Assignments 9 Table K. Interrupt Controller Pin Assignment 9 Table L. Dual LED Pin Assignments 9 Table M.General Purpose Input/Output Pin Assignment 9 Table N. Reset and Power Management Pin Assignments 10 Table O. Hardware Debug Interface 10 Table P. Pin List in Numerical Order by Pin Number 37 Table Q. Pin Descriptions 39 Table R. Pin Multiplex Usage Information 40 DS653F2 2010 Cirrus Logic All Rights Reserved EP9302 High-speed ARM9 System-on-chip Processor with MaverickCrunch Processor Core - ARM920T The ARM920T is a Harvard architecture processor with separate 16-kbyte instruction and data caches with an 8word line length but a unified memory. The processor utilizes a five-stage pipeline consisting of fetch, decode, execute, memory, and write stages. Key features include: • ARM 32-bit and Thumb 16-bit compressed instruction sets • 32-bit Advanced Micro-Controller Bus Architecture AMBA • 16 kbyte Instruction Cache with lockdown • 16 kbyte Data Cache programmable write-through or write-back with lockdown • MMU for CE and other operating systems • Translation Look Aside Buffers with 64 Data and 64 Instruction Entries • Programmable Page Sizes of 1 Mbyte, 64 kbyte, 4 kbyte, and 1 kbyte • Independent lockdown of TLB Entries MaverickCrunch Math Engine The MaverickCrunch Engine is a mixed-mode coprocessor designed primarily to accelerate the math processing required to rapidly encode digital audio formats. It accelerates single and double precision integer and floating point operations plus an integer multiply-accumulate MAC instruction that is considerably faster than the ARM920T's native MAC instruction. The ARM920T coprocessor interface is utilized thereby sharing its memory interface and instruction stream. Hardware forwarding and interlock allows the ARM to handle looping and addressing while MaverickCrunch handles computation. Features include: • IEEE-754 single and double precision floating point • 32 / 64-bit integer • Add / multiply / compare • Integer MAC 32-bit input with 72-bit accumulate • Integer Shifts • Floating point to/from integer conversion • Sixteen 64-bit register files • Four 72-bit accumulators MaverickKey Unique ID MaverickKey unique hardware programmed IDs are a solution to the growing concern over secure web content and commerce. With Internet security playing an important role in the delivery of digital media such as books or music, traditional software methods are quickly becoming unreliable. The MaverickKey unique IDs provide OEMs with a method of utilizing specific hardware IDs such as those assigned for SDMI Secure Digital Music Initiative or any other authentication mechanism. Both a specific 32-bit ID as well as a 128-bit random ID are programmed into the EP9302 through the use of laser probing technology. These IDs can then be used to match secure copyrighted content with the ID of the target device the EP9302 is powering, and then deliver the copyrighted information over a secure connection. In addition, secure transactions can benefit by also matching device IDs to server IDs. MaverickKey IDs provide a level of hardware security required for today’s Internet appliances. General Purpose Memory Interface SDRAM, SRAM, ROM, Flash The EP9302 features a unified memory address model where all memory devices are accessed over a common address/data bus. Memory accesses are performed via the Processor bus. The SRAM memory controller supports 8 and 16-bit devices and accommodates an internal boot ROM concurrently with 16-bit SDRAM memory. • 1 to 4 banks of 16-bit ,100-MHz SDRAM • Address and data bus shared between SDRAM, SRAM, ROM, and FLASH memory • NOR FLASH memory supported Table B. General Purpose Memory Interface Pin Assignments Pin Mnemonic Pin Description SDCLK SDCLKEN SDCSn[3:0] RASn CASn SDWEn CSn[7:6] and CSn[3:0] AD[25:0] DA[15:0] DQMn[1:0] WRn RDn WAITn SDRAM Clock SDRAM Clock Enable SDRAM Chip Selects 3-0 SDRAM RAS SDRAM CAS SDRAM Write Enable Chip Selects 7, 6, 3, 2, 1, 0 Address Bus 25-0 Data Bus 15-0 SDRAM Output Enables / Data Masks SRAM Write Strobe SRAM Read / OE Strobe SRAM Wait Input 2010 Cirrus Logic All Rights Reserved DS653F2 Ordering Information The order numbers for the device are: EP9302-CQZ EP9302-IQZ 0°C to +70°C -40°C to +85°C 208-pin LQFP 208-pin LQFP EP9302 CQZ Lead Free Lead Free Product Line Embedded Processor Lead Material Z = Lead Free Package Type Q = 208 pin, Low Profile Quad Flat Pack 28 mm x 28 mm Temperature Range C = Commercial E = Extended Operating Version I = Industrial Operating Version Note Go to the Cirrus Logic Internet site at to find contact information for your local sales representative. Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries "Cirrus" believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE "CRITICAL APPLICATIONS" . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, MaverickCrunch, MaverickKey, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. Microsoft and Windows are registered trademarks of Microsoft Corporation. Microwire is a trademark of National Semiconductor Corp. National Semiconductor is a registered trademark of National Semiconductor Corp. Texas Instruments is a registered trademark of Texas Instruments, Inc. Motorola and SPI are registered trademarks of Motorola, Inc. LINUX is a registered trademark of Linus Torvalds. 2010 Cirrus Logic All Rights Reserved DS653F2

PDF Datasheet Preview

EP9302 Data Sheet
• 200-MHz ARM920T Processor
• 16-kbyte Instruction Cache
• 16-kbyte Data Cache
• CE-enabled MMU
• 100-MHz System Bus
• MaverickCrunch Math Engine
• Floating point, Integer and Signal Processing Instructions
• Optimized for digital music compression and decompression algorithms.
• Hardware interlocks allow in-line coding.
• MaverickKey IDs
• 32-bit unique ID can be used for DRM-compliant, 128-bit random ID.
• Integrated Peripheral Interfaces
• 16-bit SDRAM Interface up to 4 banks
• 16-bit SRAM / FLASH / ROM
• Serial EEPROM Interface
• 1/10/100 Mbps Ethernet MAC
• Two UARTs
• Two-port USB Full-speed Host OHCI 12 Mbits per second
• IrDA Interface
• ADC
• Serial Peripheral Interface SPI Port

High-speed ARM9 System-on-chip Processor
with MaverickCrunch
• 6-channel Serial Audio Interface I2S
• 2-channel, Low-cost Serial Audio Interface AC'97
• Internal Peripherals
• 12 Direct Memory Access DMA Channels
• Real-time Clock with Software Trim
• Dual PLL controls all clock domains.
• Watchdog Timer
• Two General-purpose 16-bit Timers
• One General-purpose 32-bit Timer
• One 40-bit Debug Timer
• Interrupt Controller
• Boot ROM
• Package
• 208-pin LQFP

COMMUNICATIONS PORTS

Serial Audio Interface
2 UARTs w/

IrDA
2 USB Hosts

Ethernet MAC

Peripheral Bus 12 Channel DMA

M averickK eyTM

Processor Bus Boot ROM

MaverickCrunchTM ARM 920T

D-Cache I-Cache
16KB
16KB

Clocks & Timers

Interrupts & GPIO

Bus Bridge

SRAM & Flash I/F

Unified SDRAM I/F

MEMORY AND STORAGE 2010 Cirrus Logic All Rights Reserved

USER INTERFACE

Mar ‘10 DS653F2

EP9302 High-speed ARM9 System-on-chip Processor with MaverickCrunch

OVERVIEW

The EP9302 is an ARM920T-based system-on-a-chip design with a large peripheral set targeted to a variety of applications:
• Industrial controls
• Digital media servers
• Integrated home media gateways
• Digital audio jukeboxes
• Streaming audio players
• Set-top boxes
• Point-of-sale terminals
• Thin clients
• Biometric security systems
• GPS & fleet management systems
• Educational toys
• Industrial computers
• Industrial hand-held devices
• Voting machines
• Medical equipment

The EP9302 is one of a series of ARM920T-based devices. Other members of the family have different peripheral sets, coprocessors and package configurations.

The ARM920T microprocessor core with separate 16 kbyte, 64-way set-associative instruction and data caches is augmented by the MaverickCrunch coprocessor enabling faster than real-time compression of audio CDs.

The MaverickKey unique hardware programmed IDs are a solution to the growing concern over secure web content and commerce. With Internet security playing an important role in the delivery of digital media such as books or music, traditional software methods are quickly becoming unreliable. The MaverickKey unique IDs provide OEMs with a method of utilizing specific hardware IDs such as those assigned for SDMI Secure Digital Music Initiative or any other authentication mechanism.

A high-performance 1/10/100 Mbps Ethernet media access controller EMAC is included along with external interfaces to SPI, AC’97, and I2S audio. A two-port USB Full-speed Host OHCI 12 Mbits per second , two UARTs, and a analog voltage measurement analog-todigital converter ADC are included as well.

The EP9302 is a high-performance, low-power RISCbased, single-chip computer built around an ARM920T microprocessor core with a maximum operating clock rate of 200 MHz 184 MHz for industrial conditions . The ARM core operates from a V supply, while the I/O operates at V with power usage between 100 mW and 750 mW dependent on speed .

PP1 PP2 PP3

June 2004 July 2004 March 2005

February 2010
Ordering Information

DS653F2
2010 Cirrus Logic All Rights Reserved

EP9302 High-speed ARM9 System-on-chip Processor with MaverickCrunch

List of Figures

Figure Timing Diagram Drawing Key 13 Figure SDRAM Load Mode Register Cycle Timing Measurement 14 Figure SDRAM Burst Read Cycle Timing Measurement 15 Figure SDRAM Burst Write Cycle Timing Measurement 16 Figure SDRAM Auto Refresh Cycle Timing Measurement 17 Figure Static Memory Multiple Word Read 8-bit Cycle Timing Measurement 18 Figure Static Memory Multiple Word Write 8-bit Cycle Timing Measurement 19 Figure Static Memory Multiple Word Read 16-bit Cycle Timing Measurement 20 Figure Static Memory Multiple Word Write 16-bit Cycle Timing Measurement 21 Figure Static Memory Burst Read Cycle Timing Measurement 22 Figure Static Memory Burst Write Cycle Timing Measurement 23 Figure Static Memory Single Read Wait Cycle Timing Measurement 24 Figure Static Memory Single Write Wait Cycle Timing Measurement 25 Figure Static Memory Turnaround Cycle Timing Measurement 26 Figure Ethernet MAC Timing Measurement 28 Figure TI Single Transfer Timing Measurement 30 Figure Microwire Frame Format, Single Transfer 30 Figure SPI Format with SPH=1 Timing Measurement 31 Figure Inter-IC Sound I2S Timing Measurement 32 Figure AC ‘97 Configuration Timing Measurement 33 Figure ADC Transfer Function 34 Figure JTAG Timing Measurement 35
2010 Cirrus Logic All Rights Reserved

DS653F2

EP9302 High-speed ARM9 System-on-chip Processor with MaverickCrunch

List of Tables

Table A. Change History 2 Table B. General Purpose Memory Interface Pin Assignments 6 Table C. Ethernet Media Access Controller Pin Assignments 7 Table D. Audio Interfaces Pin Assignment 7 Table E. 12-bit Analog-to-Digital Converter Pin Assignments 7 Table F. Universal Asynchronous Receiver/Transmitters Pin Assignments 8 Table G. Dual Port USB Host Pin Assignments 8 Table H. Two-Wire Port with EEPROM Support Pin Assignments 8 Table I. Real-Time Clock with Pin Assignments 8 Table J. PLL and Clocking Pin Assignments 9 Table K. Interrupt Controller Pin Assignment 9 Table L. Dual LED Pin Assignments 9 Table M.General Purpose Input/Output Pin Assignment 9 Table N. Reset and Power Management Pin Assignments 10 Table O. Hardware Debug Interface 10 Table P. Pin List in Numerical Order by Pin Number 37 Table Q. Pin Descriptions 39 Table R. Pin Multiplex Usage Information 40

DS653F2
2010 Cirrus Logic All Rights Reserved

EP9302 High-speed ARM9 System-on-chip Processor with MaverickCrunch

Processor Core - ARM920T

The ARM920T is a Harvard architecture processor with separate 16-kbyte instruction and data caches with an 8word line length but a unified memory. The processor utilizes a five-stage pipeline consisting of fetch, decode, execute, memory, and write stages. Key features include:
• ARM 32-bit and Thumb 16-bit compressed instruction sets
• 32-bit Advanced Micro-Controller Bus Architecture AMBA
• 16 kbyte Instruction Cache with lockdown
• 16 kbyte Data Cache programmable write-through or
write-back with lockdown
• MMU for CE and other
operating systems
• Translation Look Aside Buffers with 64 Data and 64

Instruction Entries
• Programmable Page Sizes of 1 Mbyte, 64 kbyte,
4 kbyte, and 1 kbyte
• Independent lockdown of TLB Entries

MaverickCrunch Math Engine

The MaverickCrunch Engine is a mixed-mode coprocessor designed primarily to accelerate the math processing required to rapidly encode digital audio formats. It accelerates single and double precision integer and floating point operations plus an integer multiply-accumulate MAC instruction that is considerably faster than the ARM920T's native MAC instruction. The ARM920T coprocessor interface is utilized thereby sharing its memory interface and instruction stream. Hardware forwarding and interlock allows the ARM to handle looping and addressing while MaverickCrunch handles computation. Features include:
• IEEE-754 single and double precision floating point
• 32 / 64-bit integer
• Add / multiply / compare
• Integer MAC 32-bit input with 72-bit accumulate
• Integer Shifts
• Floating point to/from integer conversion
• Sixteen 64-bit register files
• Four 72-bit accumulators

MaverickKey Unique ID

MaverickKey unique hardware programmed IDs are a solution to the growing concern over secure web content and commerce. With Internet security playing an important role in the delivery of digital media such as books or music, traditional software methods are quickly becoming unreliable. The MaverickKey unique IDs
provide OEMs with a method of utilizing specific hardware IDs such as those assigned for SDMI Secure Digital Music Initiative or any other authentication mechanism.

Both a specific 32-bit ID as well as a 128-bit random ID are programmed into the EP9302 through the use of laser probing technology. These IDs can then be used to match secure copyrighted content with the ID of the target device the EP9302 is powering, and then deliver the copyrighted information over a secure connection. In addition, secure transactions can benefit by also matching device IDs to server IDs. MaverickKey IDs provide a level of hardware security required for today’s Internet appliances.

General Purpose Memory Interface SDRAM, SRAM, ROM, Flash

The EP9302 features a unified memory address model where all memory devices are accessed over a common address/data bus. Memory accesses are performed via the Processor bus. The SRAM memory controller supports 8 and 16-bit devices and accommodates an internal boot ROM concurrently with 16-bit SDRAM memory.
• 1 to 4 banks of 16-bit ,100-MHz SDRAM
• Address and data bus shared between SDRAM,

SRAM, ROM, and FLASH memory
• NOR FLASH memory supported

Table B. General Purpose Memory Interface Pin Assignments

Pin Mnemonic

Pin Description

SDCLK SDCLKEN SDCSn[3:0] RASn CASn SDWEn CSn[7:6] and CSn[3:0] AD[25:0] DA[15:0] DQMn[1:0] WRn RDn WAITn

SDRAM Clock SDRAM Clock Enable SDRAM Chip Selects 3-0 SDRAM RAS SDRAM CAS SDRAM Write Enable Chip Selects 7, 6, 3, 2, 1, 0 Address Bus 25-0 Data Bus 15-0 SDRAM Output Enables / Data Masks SRAM Write Strobe SRAM Read / OE Strobe SRAM Wait Input
2010 Cirrus Logic All Rights Reserved

DS653F2
Ordering Information

The order numbers for the device are:

EP9302-CQZ EP9302-IQZ
0°C to +70°C -40°C to +85°C
208-pin LQFP 208-pin LQFP

EP9302 CQZ

Lead Free Lead Free

Product Line Embedded Processor

Lead Material Z = Lead Free

Package Type Q = 208 pin, Low Profile Quad Flat Pack 28 mm x 28 mm

Temperature Range C = Commercial E = Extended Operating Version I = Industrial Operating Version

Note Go to the Cirrus Logic Internet site at to find contact information for your local sales representative.

Contacting Cirrus Logic Support

For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to

IMPORTANT NOTICE

Cirrus Logic, Inc. and its subsidiaries "Cirrus" believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE "CRITICAL APPLICATIONS" . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.

Cirrus Logic, Cirrus, MaverickCrunch, MaverickKey, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.

Microsoft and Windows are registered trademarks of Microsoft Corporation.

Microwire is a trademark of National Semiconductor Corp. National Semiconductor is a registered trademark of National Semiconductor Corp.

Texas Instruments is a registered trademark of Texas Instruments, Inc.

Motorola and SPI are registered trademarks of Motorola, Inc.

LINUX is a registered trademark of Linus Torvalds.
2010 Cirrus Logic All Rights Reserved

DS653F2

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived EP9302-CQZ Datasheet file may be downloaded here without warranties.

Datasheet ID: EP9302-CQZ 523231