CDB5560-2

CDB5560-2 Datasheet

CDB5560-2

Part	Datasheet
CDB5560-2	CDB5560-2 (pdf)

PDF Datasheet Preview
CDB5560-2 50 kSps, 24-bit ADC Evaluation Board Single Analog Input Channel to the CS5560 ADC Pre-configured to require a minimum number of external connections to your data acquisition system. All functionality accessible through the connector interface and board-level options. On-board V Reference Pre-configured for Master mode SPI communication to a data capture system. The CDB5560-2 is a versatile tool designed for evaluating the functionality and performance of the CS5560 ADC Analog-to-Digital Converter . The SPI serial port on the CDB5560-2 evaluation board is configured in Master mode and will start transmitting data after power-up upon reset. This evaluation board is designed to connect to your data capture system or will interface to the CapturePlus II data acquisition system available from Cirrus Logic. The CS5560 delta-sigma ADC produces fully settled conversions to full specified accuracy at 50 kSps. All evaluation board functionality for evaluating the CS5560 ADC is accessed through the connector interface and board-level options. Schematics in PADS PowerLogic format are available for download at: ORDERING INFORMATION CDB5560-2 Evaluation Board Copyright Cirrus Logic, Inc. 2007 All Rights Reserved SEP ‘07 DS790DB2 CDB5560-2 Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to you go to IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries "Cirrus" believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE "CRITICAL APPLICATIONS" . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. SPI is a trademark of Motorola, Inc. PADS and PowerLogic are trademarks of Mentor Graphics. DS790DB2 CDB5560-2 TABLE OF CONTENTS INTRODUCTION 4 Overview 5 QUICK START HARDWARE DESCRIPTION 7 Absolute Maximum Ratings 7 Power Supply 7 Analog Section 7 Analog Input Buffers 7 Multiplexer 8 ADC Reset 8 Voltage Reference 8 ADC Reference Frequency 8 Digital Section 9 Hardware Configuration 9 SPI Serial Port Communications 9 Appendix A. Maximizing the Performance of the 10 A.1 PCB Layout Considerations 10 A.2 Hardware 10 Appendix B. Bill Of Materials 11 Appendix C. Schematics 12 Appendix D. Layer Plots 17 LIST OF FIGURES Figure CDB5560-2 Block 5 Figure CDB5560-2 Board 6 Figure Schematic - Block 12 Figure Schematic - Power Supplies 13 Figure Schematic - Input Buffers and Multiplexer 14 Figure Schematic - CS5560 15 Figure Schematic - Configuration & 16 Figure Top Silkscreen 17 Figure Top Solder 18 Figure Top Routing 19 Figure Ground 20 Figure Power 21 Figure Bottom Solder 22 Figure Bottom Silkscreen 23 Figure Top Solder Paste 24 Figure Bottom Routing 25 LIST OF TABLES Table Power Supply Connections 7 Table Analog Input Connections 7 Table Analog Input Channel 8 Table Hardware Configuration Signals 9 Table Serial Interface Connections 9

PDF Datasheet Preview

CDB5560-2
50 kSps, 24-bit ADC

Evaluation Board

Single Analog Input Channel to the CS5560 ADC

Pre-configured to require a minimum number of external connections to your data acquisition system.

All functionality accessible through the connector interface and board-level options.

On-board V Reference

Pre-configured for Master mode SPI communication to a data capture system.

The CDB5560-2 is a versatile tool designed for evaluating the functionality and performance of the CS5560 ADC Analog-to-Digital Converter . The SPI serial port on the CDB5560-2 evaluation board is configured in Master mode and will start transmitting data after power-up upon reset. This evaluation board is designed to connect to your data capture system or will interface to the CapturePlus II data acquisition system available from Cirrus Logic.

The CS5560 delta-sigma ADC produces fully settled conversions to full specified accuracy at 50 kSps.

All evaluation board functionality for evaluating the CS5560 ADC is accessed through the connector interface and board-level options.

Schematics in PADS PowerLogic format are available for download at:
ORDERING INFORMATION CDB5560-2

Evaluation Board

Copyright Cirrus Logic, Inc. 2007 All Rights Reserved

SEP ‘07 DS790DB2

CDB5560-2

Contacting Cirrus Logic Support

For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to you go to

IMPORTANT NOTICE

Cirrus Logic, Inc. and its subsidiaries "Cirrus" believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE "CRITICAL APPLICATIONS" . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.

Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.

SPI is a trademark of Motorola, Inc.

PADS and PowerLogic are trademarks of Mentor Graphics.

DS790DB2

CDB5560-2

TABLE OF CONTENTS

INTRODUCTION 4

Overview 5

QUICK START

HARDWARE DESCRIPTION 7

Absolute Maximum Ratings 7

Power Supply 7

Analog Section 7

Analog Input Buffers 7

Multiplexer 8

ADC Reset 8

Voltage Reference 8

ADC Reference Frequency 8

Digital Section 9

Hardware Configuration 9

SPI Serial Port Communications 9

Appendix A. Maximizing the Performance of the 10

A.1 PCB Layout Considerations 10

A.2 Hardware 10

Appendix B. Bill Of Materials 11

Appendix C. Schematics 12

Appendix D. Layer Plots 17

LIST OF FIGURES

Figure CDB5560-2 Block 5 Figure CDB5560-2 Board 6 Figure Schematic - Block 12 Figure Schematic - Power Supplies 13 Figure Schematic - Input Buffers and Multiplexer 14 Figure Schematic - CS5560 15 Figure Schematic - Configuration & 16 Figure Top Silkscreen 17 Figure Top Solder 18 Figure Top Routing 19 Figure Ground 20 Figure Power 21 Figure Bottom Solder 22 Figure Bottom Silkscreen 23 Figure Top Solder Paste 24 Figure Bottom Routing 25

LIST OF TABLES

Table Power Supply Connections 7 Table Analog Input Connections 7 Table Analog Input Channel 8 Table Hardware Configuration Signals 9 Table Serial Interface Connections 9

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Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CDB5560-2 Datasheet file may be downloaded here without warranties.

Datasheet ID: CDB5560-2 523122