PEX8632-BB50RBC F

PEX8632-BB50RBC F Datasheet


PEX 8632 Vitals

Part Datasheet
PEX8632-BB50RBC F PEX8632-BB50RBC F PEX8632-BB50RBC F (pdf)
PDF Datasheet Preview
Version 2009

PEX 8632 Vitals
o 32-lane, 12-port PCIe Gen2 switch - Integrated GT/s SerDes
o 27 x 27mm2, 676-pin FCBGA package o Typical Power Watts

PEX 8632 Key Features
o Standards Compliant - PCI Express Base Specification, r2.0 backwards compatible w/ PCIe r1.0a/1.1 - PCI Power Management Spec, r1.2 - Microsoft Vista Compliant - Supports Access Control Services - Dynamic link-width control - Dynamic SerDes speed control
o High Performance - Non-blocking switch fabric - Full line rate on all ports - Packet Cut-Thru with 160ns max packet latency x8 to x8 - 2KB Max Payload Size - Read Pacing bandwidth throttling - Dual-Cast
o Dual-Host & Fail-Over Support - Configurable Non-Transparent port - Moveable upstream port - Crosslink port capability
o Quality of Service QoS - Eight traffic classes per port - Weighted round-robin source port arbitration
o Reliability, Availability, Serviceability - 3 Hot Plug Ports with native HP Signals - All ports hot plug capable thru I2C Hot Plug Controller on every port - ECRC and Poison bit support - Data Path parity - Memory RAM Error Correction - INTA# and FATAL_ERR# signals - Advanced Error Reporting - Port Status bits and GPIO available - Per port error diagnostics - Performance Monitoring
• Per port payload & header counters

PEX 8632

PCIe Gen2, 5.0GT/s 32-lane, 12-port Switch

The ExpressLaneTM PEX 8632 device offers PCI Express switching capability enabling users to add scalable high bandwidth, non-blocking interconnection to a wide variety of applications including servers, storage systems, and communications platforms. The PEX 8632 is well suited for fan-out, aggregation, and peer-to-peer applications.

High Performance & Low Packet Latency The PEX 8632 architecture supports packet cut-thru with a maximum latency of 160ns x8 to x8 . This, combined with large packet memory and non-blocking internal switch architecture, provides full line rate on all ports for performance-hungry applications such as servers and switch fabrics. The low latency enables applications to achieve high throughput and performance. In addition to low latency, the device supports a max payload size of 2048 bytes, enabling the user to achieve even higher throughput.

Data Integrity The PEX 8632 provides end-to-end CRC ECRC protection and Poison bit support to enable designs that require end-to-end data integrity. PLX also supports data path parity and memory RAM error correction as packets pass through the switch.

Flexible Register & Port Configuration

The PEX 8632’s 12 ports can be configured to lane widths of x1, x2, x4, x8,
or x16. Flexible buffer allocation, along with the device's flexible packet
flow control, maximizes throughput for applications where more traffic
flows in the downstream, rather than upstream, direction. Any port can be
designated as the upstream port, which can be changed dynamically. The

PEX 8632 also provides
several ways to configure
its registers. The device
can be configured
through strapping pins, I2C interface, host

PEX 8632

PEX 8632
software, or an optional
serial EEPROM. This allows for easy debug
3 x4 8 x2
2 x8 2 x4
during the development phase, performance
monitoring during the
operation phase, and driver or software

PEX 8632

PEX 8632
upgrade. Figure 1 shows
some of the PEX 8632’s
common port
10 x2
Product Ordering Information

Part Number PEX8632-BB50BC PEX8632-BB50BC F PEX8632-BB RDK

Description 32-Lane, 12-Port PCI Express Switch 27x27mm2 32-Lane, 12-Port PCI Express Switch, Pb-Free 27x27mm2

PEX 8632 Rapid Development Kit

Please visit the PLX Web site at or contact PLX sales at 408-774-9060 for sampling.
2009 PLX Technology, Inc. All rights reserved. PLX and the PLX logo are registered trademarks of PLX Technology, Inc. ExpressLane is a trademark of PLX Technology, Inc., which may be registered in some jurisdiction. All other product names that appear in this material are for identification purposes only and are acknowledged to be trademarks or registered trademarks of their respective companies. Information supplied by PLX is believed to be accurate and reliable, but PLX Technology, Inc. assumes no responsibility for any errors that may appear in this material. PLX Technology, Inc. reserves the right, without notice, to make changes in product design or specification.

PEX8632-SIL-PB-1.0
04/09
More datasheets: AO4728 | WLRG-RA-DP101 | DN-19GS | SGEL108CV-A-Z | SGE106CV-A-Z | SGE108CV-A-Z | SGE108CV-Z | SGEL106CV-A-Z | SGEL106CVR-A-Z | B57540G1303F000


Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived PEX8632-BB50RBC F Datasheet file may be downloaded here without warranties.

Datasheet ID: PEX8632-BB50RBC F 520509