HBCU-5710R

HBCU-5710R Datasheet

HBCU-5710R 1000BASE-T Small Form Pluggable Low Voltage V Electrical Transceiver over Category 5 Unshielded Twisted Pair Cable

Part	Datasheet
HBCU-5710R	HBCU-5710R (pdf)

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HBCU-5710R 1000BASE-T Small Form Pluggable Low Voltage V Electrical Transceiver over Category 5 Unshielded Twisted Pair Cable Data Sheet The HBCU-5710R electrical transceiver from Avago Technologies offers full duplex throughput of 1000 Mb/s by transporting data over unshielded twisted pair category 5 cable with 5-level PAM Pulse Amplitude Modulation signals. The Avago Technologies 1000BASE-T module takes signals from both the twisted pair category 5 cable and the SerDes interface. Pin count overhead between the MAC and the PHY is minimized, and Gigabit Ethernet operation is achieved with maximum space savings. Related Products • HFBR-5601 850 nm +5 V Gigabit Interface Converter GBIC for Gigabit Ethernet • HFBR-53D5 850 nm +5 V 1x9 optical transceiver for Gigabit Ethernet • HFBR-5710L 850 nm V SFP optical transceiver for Gigabit Ethernet • HFBR-5912E 850 nm V SFF optical transceiver for Gigabit Ethernet • HDMP-1636A Gbps TRx family of SerDes IC • HFBR-0534 SFP Evaluation Kit • Designed for Industry-Standard MSA-Compliant, Small Form Factor Pluggable SFP Ports • Compatible with IEEE • Custom RJ-45 connector with integrated magnetics • Link lengths at Gbd up to 100 m per IEEE802.3 • Low power, high performance Gbd SerDes inte- grated in module • Single V power supply operation • Auto-negotiation per IEEE Clause 28 1000BASE-T and Clause 37 1000BASE-X • Switch to switch interface • Switched backplane applications • File server interface Module Diagrams Figure 1 illustrates the major functional components of the HBCU-5710R. The 20-pin connection diagram of module printed circuit board of the module is shown in Figure 3 depicts the pin assignment of the MDI RJ45 jack . Figure 7 depicts the external configuration and dimensions of the module. Installation The HBCU-5710R can be installed in or removed from any MultiSource Agreement MSA compliant Small Form Pluggable port whether the host equipment is operating or not. The module is simply inserted, small end first, under finger-pressure. Controlled hot-plugging is ensured by design and by 3-stage pin sequencing at the electrical interface to the host board. The module housing makes initial contact with the host board EMI shield, mitigating potential damage due to Electro-Static Discharge ESD . The module pins sequentially contact the 1 Ground, 2 Power, and 3 Signal pins of the host board surface mount connector. This printed circuit board card-edge connector is depicted in Figure Serial Identification EEPROM The HBCU-5710R complies with an industry standard MultiSource Agreement that defines the serial identification protocol. This protocol uses the 2-wire serial CMOS EEPROM protocol of the ATMEL AT24C01A or equivalent. The contents of the HBCU-5710R serial ID memory are defined in Table 3 as specified in the SFP MSA. Controller and Data I/O Data I/Os are designed to accept industry standard differential signals. In order to reduce the number of passive components required on the customer’s board, Avago Technologies has included the functionality of the transmitter bias resistors and coupling capacitors within the module. The transceiver is compatible with an “ac-coupled” configuration and is internally terminated. Figure 1 depicts the functional diagram of the HBCU-5710R. Caution should be taken into account for the proper interconnection between the supporting Physical Layer integrated circuits and the HBCU-5710R. Figure 4 illustrates the recommended interface circuit. Several control data signals and timing diagrams are implemented in the module and are depicted in Figure VEET VEET VCCT VCCR VEER VEER VEET TX_FAULT TX_DISABLE MOD-DEF 2 MOD-DEF 1 MOD-DEF 0 Rate Select VEER VEER Top of Board Ordering Information Please contact your local field sales engineer or one of Avago Technologies’ franchised distributors for ordering information. For technical information, please visit Avago Technologies’ web page at or contact Avago Technologies’ Semiconductor Products Customer Response Center at For information related to the MSA visit SFP/index.html V_SUPPLY 10 uF 1 uH uF VCC_T VCC_R 1 uH 10 uF TX_DISABLE TX_FAULT TX[0:9] HDMP- PROTOCOL 1636A RX[0:9] TD+ TD- RD+ RD- RX_LOS MOD_DEF 1 MOD_DEF 2 MOD_DEF 0 REF CLK K V_SUPPLY Figure 4 Typical Application Configuration HBCU-5710R PHY IC uF 100 uF uF 50 uF 50 RJ45 JACK & MAGNETICS CAT5 CABLE EEPROM V_SUPPLY 10 UF 1 UH UF 1 UH 10 UF Note Inductors must have less than 1 ohm series resistance per MSA. Figure 5 MSA Recommended Power Supply Filter Table 2 20-pin Connection Diagram Description Pin Name Function/Description MSA Notes VEET TX Fault Transmitter Ground Transmitter Fault Indication - High Indicates a Fault Note 1 TX Disable

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HBCU-5710R 1000BASE-T Small Form Pluggable Low Voltage V Electrical Transceiver over Category 5 Unshielded Twisted Pair Cable

Data Sheet

The HBCU-5710R electrical transceiver from Avago Technologies offers full duplex throughput of 1000 Mb/s by transporting data over unshielded twisted pair category 5 cable with 5-level PAM Pulse Amplitude Modulation signals. The Avago Technologies 1000BASE-T module takes signals from both the twisted pair category 5 cable and the SerDes interface. Pin count overhead between the MAC and the PHY is minimized, and Gigabit Ethernet operation is achieved with maximum space savings.

Related Products
• HFBR-5601 850 nm +5 V Gigabit Interface Converter GBIC for Gigabit Ethernet
• HFBR-53D5 850 nm +5 V 1x9 optical transceiver for Gigabit Ethernet
• HFBR-5710L 850 nm V SFP optical transceiver for Gigabit Ethernet
• HFBR-5912E 850 nm V SFF optical transceiver for Gigabit Ethernet
• HDMP-1636A Gbps TRx family of SerDes IC
• HFBR-0534 SFP Evaluation Kit
• Designed for Industry-Standard MSA-Compliant, Small Form Factor Pluggable SFP Ports
• Compatible with IEEE
• Custom RJ-45 connector with integrated magnetics
• Link lengths at Gbd up to 100 m per IEEE802.3
• Low power, high performance Gbd SerDes inte-
grated in module
• Single V power supply operation
• Auto-negotiation per IEEE Clause 28
1000BASE-T and Clause 37 1000BASE-X
• Switch to switch interface
• Switched backplane applications
• File server interface

Module Diagrams

Figure 1 illustrates the major functional components of the HBCU-5710R. The 20-pin connection diagram of module printed circuit board of the module is shown in Figure 3 depicts the pin assignment of the MDI RJ45 jack .

Figure 7 depicts the external configuration and dimensions of the module.

Installation

The HBCU-5710R can be installed in or removed from any MultiSource Agreement MSA compliant Small Form Pluggable port whether the host equipment is operating or not. The module is simply inserted, small end first, under finger-pressure. Controlled hot-plugging is ensured by design and by 3-stage pin sequencing at the electrical interface to the host board. The module housing makes initial contact with the host board EMI shield, mitigating potential damage due to Electro-Static Discharge ESD . The module pins sequentially contact the 1 Ground, 2 Power, and 3 Signal pins of the host board surface mount connector. This printed circuit board card-edge connector is depicted in Figure

Serial Identification EEPROM

The HBCU-5710R complies with an industry standard MultiSource Agreement that defines the serial identification protocol. This protocol uses the 2-wire serial CMOS EEPROM protocol of the ATMEL AT24C01A or equivalent. The contents of the HBCU-5710R serial ID memory are defined in Table 3 as specified in the SFP MSA.

Controller and Data I/O

Data I/Os are designed to accept industry standard differential signals. In order to reduce the number of passive components required on the customer’s board, Avago Technologies has included the functionality of the transmitter bias resistors and coupling capacitors within the module. The transceiver is compatible with an “ac-coupled” configuration and is internally terminated. Figure 1 depicts the functional diagram of the HBCU-5710R.

Caution should be taken into account for the proper interconnection between the supporting Physical Layer integrated circuits and the HBCU-5710R. Figure 4 illustrates the recommended interface circuit.

Several control data signals and timing diagrams are implemented in the module and are depicted in Figure

VEET

VEET

VCCT

VCCR

VEER

VEER

VEET

TX_FAULT

TX_DISABLE

MOD-DEF 2

MOD-DEF 1

MOD-DEF 0

Rate Select

VEER

VEER

Top of Board
Ordering Information
Please contact your local field sales engineer or one of Avago Technologies’ franchised distributors for ordering information. For technical information, please visit Avago Technologies’ web page at or contact Avago Technologies’ Semiconductor Products Customer Response Center at For information related to the MSA visit SFP/index.html

V_SUPPLY 10 uF
1 uH uF

VCC_T

VCC_R 1 uH
10 uF

TX_DISABLE TX_FAULT

TX[0:9]

HDMP-

PROTOCOL
1636A

RX[0:9]

TD+ TD-

RD+ RD-

RX_LOS

MOD_DEF 1 MOD_DEF 2 MOD_DEF 0

REF CLK

K V_SUPPLY

Figure 4 Typical Application Configuration

HBCU-5710R

PHY IC
uF 100 uF
uF 50
uF 50

RJ45 JACK & MAGNETICS

CAT5 CABLE

EEPROM

V_SUPPLY 10 UF
1 UH UF
1 UH 10 UF

Note Inductors must have less than 1 ohm series resistance per MSA.

Figure 5 MSA Recommended Power Supply Filter

Table 2 20-pin Connection Diagram Description

Pin Name

Function/Description

MSA Notes

VEET

TX Fault

Transmitter Ground Transmitter Fault Indication - High Indicates a Fault

Note 1

TX Disable

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived HBCU-5710R Datasheet file may be downloaded here without warranties.

Datasheet ID: HBCU-5710R 520245