BCM1480B1K900

BCM1480B1K900 Datasheet

BCM1480

Part	Datasheet
BCM1480B1K900	BCM1480B1K900 (pdf)

Related Parts	Information
BCM1480B0K800	BCM1480B0K800

PDF Datasheet Preview
BCM1480 QUAD-CORE 64-BIT PROCESSOR WITH SPI-4/HT • Four 64-bit CPUs, scalable from 800 GHz • Quad-issue in-order pipeline with dual-execute and dual-memory pipes • Enhanced skew pipeline enables a zero load-to-use penalty • 32-KB instruction cache and 32-KB data cache ECC protected • Fast on-chip multiprocessor bus • Connects the CPUs, L2 cache, memory controller, and I/O bridges • Runs at half the CPU core frequency and is 256 bits wide • On-chip L2 cache • 1 MB shared by four CPUs and I/O agents • Eight-way associative, ECC protected • Any way can be programmed as fast on-chip RAM • DDR memory controller • Memory bandwidth as high as 100 Gbps • Configurable as 2x64-bit or 4x32-bit wide channels • Runs up to 400-MHz clock rate, 800-MHz data rate • Support for DDR1 and DDR2 • Three independent, full-duplex ports • Configurable as 16/8-bit HyperTransport HT formerly LDT or Channelized OIF SPI-4 Phase 2 • Runs up to 600 MHz DDR for aggregate bandwidth of Gbps per port • Includes Intelligent Hash and Filter Engine on each port to route packets • Supports glueless connectivity of multiple BCM1480 devices to build a distributed shared-memory system with hardware-based coherency • On-chip switch • Connects multiprocessor bus to high-speed interfaces • 256-Gbps bisection bandwidth • Supports both packet transfer and memory transactions • Integrated network and system I/O • Four Gigabit-Ethernet MACs configurable as packet FIFO interfaces • 64-bit PCI-X interface at 133 MHz • Generic I/O for direct connect to boot ROM, flash memory • Two SMBus serial configuration interfaces • PCMCIA control interface and up to 16 interrupts • Four UART interfaces • On-chip debug capability • EJTAG • Bus trace unit internal logic analyzer Support for leading operating systems, including and SUMMARY OF BENEFITS • Industry-leading performance • Dhrystone MIPS/MHz per CPU • 20 Million packets per second of L3 forwarding • 128 Gbps GHz on-chip bus bandwidth, with 100 Gbps memory bandwidth and over 145 Gbps I/O Bandwidth • Low-power dissipation of 23W 1 GHz • High functional integration, reducing overall system cost • Programming ease and flexibility based on MIPS64 instruction set architecture ISA • Software compatible with BCM1250 and BCM112x • Broad tools and system software support Because of its world-class performance, power efficiency, and integration, the BCM1480 processor is ideal for a broad variety of applications, including • Enterprise-class routers and switches • Multifunction security platforms VPN/SSL/IDS • High-end RAID Arrays • SAN routers/gateways/switches • Wireless infrastructure platforms e.g., RNC, GGSN, MSC • High-density computing Scalable Cluster of BCM1480 DDR DRAM DDR DRAM Customer SPI-4.2 SPI-4.2 ASIC BCM1480 BCM1480 Fabric Interface 10 x GE or SPI-4.2

PDF Datasheet Preview

BCM1480

QUAD-CORE 64-BIT PROCESSOR WITH SPI-4/HT
• Four 64-bit CPUs, scalable from 800 GHz
• Quad-issue in-order pipeline with dual-execute and dual-memory pipes
• Enhanced skew pipeline enables a zero load-to-use penalty
• 32-KB instruction cache and 32-KB data cache ECC protected
• Fast on-chip multiprocessor bus
• Connects the CPUs, L2 cache, memory controller, and I/O bridges
• Runs at half the CPU core frequency and is 256 bits wide
• On-chip L2 cache
• 1 MB shared by four CPUs and I/O agents
• Eight-way associative, ECC protected
• Any way can be programmed as fast on-chip RAM
• DDR memory controller
• Memory bandwidth as high as 100 Gbps
• Configurable as 2x64-bit or 4x32-bit wide channels
• Runs up to 400-MHz clock rate, 800-MHz data rate
• Support for DDR1 and DDR2
• Three independent, full-duplex ports
• Configurable as 16/8-bit HyperTransport HT formerly LDT or Channelized OIF SPI-4 Phase 2
• Runs up to 600 MHz DDR for aggregate bandwidth of Gbps per port
• Includes Intelligent Hash and Filter Engine on each port to route packets
• Supports glueless connectivity of multiple BCM1480 devices to build a distributed shared-memory system with hardware-based coherency
• On-chip switch
• Connects multiprocessor bus to high-speed interfaces
• 256-Gbps bisection bandwidth
• Supports both packet transfer and memory transactions
• Integrated network and system I/O
• Four Gigabit-Ethernet MACs configurable as packet FIFO interfaces
• 64-bit PCI-X interface at 133 MHz
• Generic I/O for direct connect to boot ROM, flash memory
• Two SMBus serial configuration interfaces
• PCMCIA control interface and up to 16 interrupts
• Four UART interfaces
• On-chip debug capability
• EJTAG
• Bus trace unit internal logic analyzer

Support for leading operating systems, including and

SUMMARY OF BENEFITS
• Industry-leading performance
• Dhrystone MIPS/MHz per CPU
• 20 Million packets per second of L3 forwarding
• 128 Gbps GHz on-chip bus bandwidth, with 100 Gbps memory bandwidth and over 145 Gbps I/O Bandwidth
• Low-power dissipation of 23W 1 GHz
• High functional integration, reducing overall system cost
• Programming ease and flexibility based on MIPS64 instruction set architecture ISA
• Software compatible with BCM1250 and BCM112x
• Broad tools and system software support

Because of its world-class performance, power efficiency, and integration, the BCM1480 processor is ideal for a broad variety of applications, including
• Enterprise-class routers and switches
• Multifunction security platforms VPN/SSL/IDS
• High-end RAID Arrays
• SAN routers/gateways/switches
• Wireless infrastructure platforms e.g., RNC, GGSN, MSC
• High-density computing

Scalable Cluster of BCM1480

DDR DRAM

DDR DRAM

Customer SPI-4.2

SPI-4.2

ASIC

BCM1480

BCM1480

Fabric Interface
10 x GE or SPI-4.2

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived BCM1480B1K900 Datasheet file may be downloaded here without warranties.

Datasheet ID: BCM1480B1K900 520202