UP2-DEVKIT/UNIV

UP2-DEVKIT/UNIV Datasheet


University Program UP2 Education Kit

Part Datasheet
UP2-DEVKIT/UNIV UP2-DEVKIT/UNIV UP2-DEVKIT/UNIV (pdf)
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December 2004, v3.1

University Program UP2 Education Kit

User Guide

Introduction

The University Program UP2 Education Kit was designed to meet the needs of universities teaching digital logic design with state-of-the-art development tools and programmable logic devices PLDs . The package provides all of the necessary tools for creating and implementing digital logic designs, including the following features:
• II Web-Edition development software
• UP2 Education Board

An EPF10K70 device in a 240-pin power quad flat pack RQFP package

An EPM7128S device in an 84-pin plastic J-lead chip carrier PLCC package
• ByteBlasterTM II parallel port download cable

Quartus II Software

The Quartus II University software contains many of the features of the commercial version of the Quartus II software including a completely integrated design flow and an intuitive graphical user interface. This software supports schematic capture and text-based hardware description language HDL design entry, including Verilog HDL, VHDL, and the Hardware Description Language AHDLTM . It also provides design programming, compilation, and verification support for all devices supported by the Quartus II Web-Edition software including the EPM7128S, and EPF10K70 devices. The Quartus II software can be freely distributed to students for installation on their personal computers and provides instant access to online help.
1 For information on how to install the Quartus II software on your computer, see “Software Installation” on page

UP2 Education Board

The UP2 Education Board is a stand-alone experiment board based on a 10K device and includes a 7000 device. When used with the Quartus II software, the board provides a superior platform for learning digital logic design using industry-standard development tools and PLDs.

Altera Corporation

A-UG-UP1-3.1 P25-09231-01

University Program UP2 Education Kit User Guide

The board is designed to meet the needs of instructors and students in a laboratory environment. The UP2 Education Board supports both look-up table LUT -based and product term-based architectures. The EPF10K70 device can be configured in-system with either the ByteBlaster II download cable or an EPC1 configuration device. Additional download cables can be purchased separately. The EPM7128S device can be programmed in-system with the ByteBlaster II download cable.

EPF10K70 Device

The EPF10K70 device is based on SRAM technology. It is available in a 240-pin RQFP package and has 3,744 logic elements LEs and nine embedded array blocks EABs . Each LE consists of a four-input LUT, a programmable flipflop, and dedicated signal paths for carry-and-cascade functions. Each EAB provides 2,048 bits of memory which can be used to create RAM, ROM, or first-in first-out FIFO functions. EABs can also implement logic functions, such as multipliers, microcontrollers, state machines, and digital signal processing DSP functions. With 70,000 typical gates, the EPF10K70 device is ideal for intermediate to advanced digital design courses, including computer architecture, communications, and DSP applications.

For more information on FLEX 10K devices, see the FLEX 10K Embedded Programmable Logic Family Data Sheet.

EPM7128S Device

The EPM7128S device, a member of the high-density, high-performance MAX 7000S family, is based on erasable programmable read-only memory EEPROM elements. The EPM7128S device features a socketmounted 84-pin plastic j-lead chip carrier PLCC package and has 128 macrocells. Each macrocell has a programmable-AND/fixed-OR array as well as a configurable register with independently-programmable clock, clock enable, clear, and preset functions. With a capacity of 2,500 gates and a simple architecture, the EPM7128S device is ideal for introductory designs as well as larger combinatorial and sequential logic functions.

For more information on MAX 7000 devices, go to the MAX 7000 Programmable Logic Device Family Data Sheet.

ByteBlaster II Parallel Port Download Cable

Designs can be easily and quickly downloaded into the UP2 Education Board using the ByteBlaster II download cable, which is a hardware interface to a standard parallel port. This cable sends programming or configuration data between the Quartus II software and the UP2

Altera Corporation

UP2 Education Board Description

University Program UP2 Education Kit User Guide

Education Board. Because design changes are downloaded directly to the devices on the board, prototyping is easy and multiple design iterations can be accomplished in quick succession.

The UP2 Education Board, shown in Figure 1, contains the features described in this section.

Figure UP2 Education Board Block Diagram

MAX_EXPANSION JTAG_IN

DEVICE BOARD

MOUSE

DC_IN RAW

C2 TDI TDO

R2 VGA

CONF_D TCK POWER
+ DC + P1

FLEX_DIGIT EPC1
More datasheets: 17000188A | AT28LV010-20PU | FMG1G100US60L | FQPF3N50C | ECS-327KO-TR | 98044043721 | HI1812N121R-10 | HG-8002JA 40.0000M-PHCX | HG-8002JA 12.0000M-PCAVL3:ROHS | HG-8002JA 40.0000M-PCCXL3:ROHS


Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived UP2-DEVKIT/UNIV Datasheet file may be downloaded here without warranties.

Datasheet ID: UP2-DEVKIT/UNIV 517159