HC20K600FC672

HC20K600FC672 Datasheet

HC20K400 1,052,000 400,000

Part	Datasheet
HC20K600FC672	HC20K600FC672 (pdf)

Related Parts	Information
HC20K600FC672AC	HC20K600FC672AC
HC20K600FC672AB	HC20K600FC672AB
HC20K600FC672AA	HC20K600FC672AA
HC20K600BC652AD	HC20K600BC652AD
HC20K600BC652	HC20K600BC652
HC20K400FC672AH	HC20K400FC672AH
HC20K400FC672AG	HC20K400FC672AG
HC20K400FC672AF	HC20K400FC672AF
HC20K400FC672	HC20K400FC672
HC20K600FC672N	HC20K600FC672N
HC20K1000FC672	HC20K1000FC672
HC20K1000FC672AB	HC20K1000FC672AB
HC20K600FC672NAB	HC20K600FC672NAB
HC20K600FC672NAA	HC20K600FC672NAA

PDF Datasheet Preview
Section II. HardCopy APEX Device Family Data Sheet This section provides designers with the data sheet specifications for APEXTM devices. These chapters contain feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC operating conditions, AC timing parameters, a reference to power consumption, and ordering information for HardCopy APEX devices. This section contains the following: • Chapter 7, Introduction to HardCopy APEX Devices • Chapter 8, Description, Architecture, and Features • Chapter 9, Boundary-Scan Support • Chapter 10, Operating Conditions Altera Corporation Section Preliminary HardCopy Series Handbook, Volume 1 Section Preliminary Altera Corporation H51006-2.3 Introduction Features... Introduction to HardCopy APEX Devices APEXTM devices enable high-density APEX 20KE device technology to be used in high-volume applications where significant cost reduction is desired. HardCopy APEX devices are physically and functionally compatible with APEX 20KC and APEX 20KE devices. They combine the time-to-market advantage, performance, and flexibility of APEX 20KE devices with the ability to move to high-volume, low-cost devices for production. The migration process from an APEX 20KE device to a HardCopy APEX device is fully automated, with designer involvement limited to providing a few II software-generated output files. HardCopy APEX devices are manufactured using an 0.18-um CMOS six-layer-metal process technology: • Preserves functionality of a configured APEX 20KC or APEX 20KE device • Pin-compatible with APEX 20KC or APEX 20KE devices • Meets or exceeds timing of configured APEX 20KE and APEX 20KC devices • Optional emulation of original programmable logic device PLD programming sequence • High-performance, low-power device • MultiCore architecture integrating embedded memory and look-up table LUT logic used for register-intensive functions • Embedded system blocks ESBs used to implement memory functions, including first-in first-out FIFO buffers, dual-port RAM, and content-addressable memory CAM • Customization performed through metallization layers Altera Corporation September 2008 HardCopy Series Handbook, Volume 1 High-density architecture: • 400,000 to million typical gates Table • Up to 51,840 logic elements LEs • Up to 442,368 RAM bits that can be used without reducing available logic Table HardCopy APEX Device Features Note 1 Feature Maximum system gates Typical gates LEs ESBs Maximum RAM bits Phase-locked loops PLLs Maximum macrocells Maximum user I/O pins HC20K400 1,052,000 400,000 16,640 104 212,992 4 1,664 488 HC20K600 1,537,000 600,000 24,320 152 311,296 4 2,432 588 HC20K1000 1,772,000 1,000,000 38,400 160

PDF Datasheet Preview

Section II. HardCopy APEX Device Family Data

Sheet
This section provides designers with the data sheet specifications for APEXTM devices. These chapters contain feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC operating conditions, AC timing parameters, a reference to power consumption, and ordering information for HardCopy APEX devices.

This section contains the following:
• Chapter 7, Introduction to HardCopy APEX Devices
• Chapter 8, Description, Architecture, and Features
• Chapter 9, Boundary-Scan Support
• Chapter 10, Operating Conditions

Altera Corporation

Section Preliminary

HardCopy Series Handbook, Volume 1

Section Preliminary

Altera Corporation

H51006-2.3

Introduction

Features...

Introduction to HardCopy APEX Devices

APEXTM devices enable high-density APEX 20KE device technology to be used in high-volume applications where significant cost reduction is desired. HardCopy APEX devices are physically and functionally compatible with APEX 20KC and APEX 20KE devices. They combine the time-to-market advantage, performance, and flexibility of APEX 20KE devices with the ability to move to high-volume, low-cost devices for production. The migration process from an APEX 20KE device to a HardCopy APEX device is fully automated, with designer involvement limited to providing a few II software-generated output files.

HardCopy APEX devices are manufactured using an 0.18-um CMOS six-layer-metal process technology:
• Preserves functionality of a configured APEX 20KC or APEX 20KE device
• Pin-compatible with APEX 20KC or APEX 20KE devices
• Meets or exceeds timing of configured APEX 20KE and APEX 20KC
devices
• Optional emulation of original programmable logic device PLD
programming sequence
• High-performance, low-power device
• MultiCore architecture integrating embedded memory and look-up
table LUT logic used for register-intensive functions
• Embedded system blocks ESBs used to implement memory
functions, including first-in first-out FIFO buffers, dual-port RAM, and content-addressable memory CAM
• Customization performed through metallization layers

Altera Corporation

September 2008

HardCopy Series Handbook, Volume 1

High-density architecture:
• 400,000 to million typical gates Table
• Up to 51,840 logic elements LEs
• Up to 442,368 RAM bits that can be used without reducing available
logic

Table HardCopy APEX Device Features Note 1

Feature Maximum system gates Typical gates LEs ESBs Maximum RAM bits Phase-locked loops PLLs Maximum macrocells Maximum user I/O pins

HC20K400 1,052,000 400,000
16,640 104
212,992 4
1,664 488

HC20K600 1,537,000 600,000
24,320 152
311,296 4
2,432 588

HC20K1000 1,772,000 1,000,000
38,400 160

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Datasheet ID: HC20K600FC672 517145