CY7B9911-5JC

CY7B9911-5JC Datasheet

CY7B9911 RoboClock+

Part	Datasheet
CY7B9911-5JC	CY7B9911-5JC (pdf)

Related Parts	Information
CY7B9911-5JCT	CY7B9911-5JCT

PDF Datasheet Preview
CY7B9911 RoboClock+ Programmable Skew Clock Buffer • All Output Pair Skew <100 ps Typical 250 max • MHz to 100 MHz Output Operation • User Selectable Output Functions Selectable Skew to 18 ns Inverted and Non-inverted Operation at and ¼ Input Frequency Operation at 2x and 4x Input Frequency input as low as MHz • Zero Input to Output Delay • 50% Duty Cycle Outputs • Outputs Drive terminated lines • Low Operating Current • 32-pin PLCC/LCC Package • Jitter <200 ps Peak-to-peak <25 ps RMS Logic Block Diagram TEST Functional Description The CY7B9911 High Speed Programmable Skew Clock Buffer PSCB offers user selectable control over system clock functions. This multiple output clock driver provides the system integrator with functions necessary to optimize the timing of high performance computer systems. Each of the eight individual TTL drivers, arranged in four pairs of user controllable outputs, can drive terminated transmission lines with impedances as low as They deliver minimal and specified output skews and full swing logic levels. Each output is hardwired to one of nine delay or function configurations. Delay increments of to ns are determined by the operating frequency with outputs able to skew up to ±6 time units from their nominal “zero” skew position. The completely integrated PLL allows cancellation of external load and transmission line delay effects. When this “zero delay” capability of the PSCB is combined with the selectable output skew functions, you can create output-to-output delays of up to ±12 time units. Divide-by-two and divide-by-four output functions are provided for additional flexibility in designing complex clock systems. When combined with the internal PLL, these divide functions enable distribution of a low frequency clock that is multiplied by two or four at the clock destination. This facility minimizes clock distribution difficulty enabling maximum system clock speed and flexibility. FB REF PHASE FREQ FILTER DET VCO AND TIME UNIT GENERATOR SELECT INPUTS THREE LEVEL 3F0 SKEW 3F1 3Q1 SELECT 2Q0 2F0 MATRIX 1F1 1Q1 • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY7B9911 RoboClock+ Contents 1 Functional 1 Logic Block 1 Contents 2 Pin Configuration 3 Block Diagram 4 Phase Frequency Detector and Filter.......................... 4 VCO and Time Unit Generator 4 Skew Select 4 Test 5 Maximum 5 Operating 6 Electrical 6 Capacitance 7 AC Timing Diagrams 9 Operational Mode Descriptions 10 Ordering 13 Package 13 Document History Page 14 Sales, Solutions, and Legal Information 15 Worldwide Sales and Design Support....................... 15 Products 15 PSoC Solutions 15 Page 2 of 15 [+] Feedback Pin Configuration Figure Pin Configuration 32-Pin PLCC/LCC Package CY7B9911 RoboClock+ 3F0 FS VCCQ REF GND TEST 2F1 3F1 4F0 4F1 VCCQ VCCN 4Q1 4Q0 GND 4 3 2 1 32 31 30 CY7B9911 25 14 15 16 17 18 19 20 2F0 GND 1F1 1F0 VCCN 1Q0 1Q1 GND 3Q1 3Q0 V FB VCCN 2Q1 2Q0 Table Pin Definition Signal Name FB FS 1F0, 1F1 2F0, 2F1 3F0, 3F1 4F0, 4F1 TEST 1Q0, 1Q1 2Q0, 2Q1 3Q0, 3Q1 4Q0, 4Q1 VCCN VCCQ GND I O PWR Description Reference frequency input. This input supplies the frequency and timing against which all functional variation is measured. PLL feedback input typically connected to one of the eight outputs . Three level frequency range select. See Table Three level function select inputs for output pair 1 1Q0, 1Q1 . See Table Three level function select inputs for output pair 2 2Q0, 2Q1 . See Table 3 Three level function select inputs for output pair 3 3Q0, 3Q1 . See Table 3 Three level function select inputs for output pair 4 4Q0, 4Q1 . See Table 3 Three level select. See test mode section under the block diagram descriptions. Output pair See Table Output pair See Table Output pair See Table Output pair See Table Power supply for output drivers. Power supply for internal circuitry. Ground. Page 3 of 15 [+] Feedback CY7B9911 RoboClock+ Block Diagram Description Phase Frequency Detector and Filter The Phase Frequency Detector and Filter blocks accept inputs from the reference frequency REF input and the feedback FB input. They generate correction information to control the frequency of the Voltage controlled Oscillator VCO . These blocks, along with the VCO, form a Phase Locked Loop PLL that tracks the incoming REF signal. VCO and Time Unit Generator The VCO accepts analog control inputs from the PLL filter block and generates a frequency that is used by the time unit generator to create discrete time units that are selected in the skew select matrix. The operational range of the VCO is determined by the FS control pin. The time unit tU is determined by the operating frequency of the device and the level of the FS pin as shown in Table Table Frequency Range Select and tU Calculation[1] FS[2,3] fNOM MHz Min Max tU = N = Approximate Frequency MHz At Which tU = ns LOW 15 30 25 50 HIGH 40 100 Skew Select Matrix The skew select matrix contains four independent sections. Each section has two low skew, high fanout drivers xQ0, xQ1 , and two corresponding three level function select xF0, xF1 inputs. Table 3 shows the nine possible output functions for each section as determined by the function select inputs. All times are measured with respect to the REF input assuming that the output connected to the FB input has 0tU selected. Table Programmable Skew Configurations[1] Function Selects Output Functions 1F1, 2F1, 1F0, 2F0, 1Q0, 1Q1, 3F1, 4F1 3F0, 4F0 2Q0, 2Q1 3Q0, 3Q1 4Q0, 4Q1 LOW MID HIGH Ordering Information Accuracy ps 500 Ordering Code Ordering Code Definitions CY 7B9911 - 5 J C T Package Type 32-pin Plastic Leaded Chip Carrier 32-pin Plastic Leaded Chip Carrier - Tape and Reel Operating Range Commercial Package Diagram T = Tape and Reel, Blank = Standard Temperature Range C = Commercial = 0 °C to 70 °C Package Type J = Plastic Leaded Chip Carrier Propagation delay 5 = 500 ps max Base part number Company ID CY = Cypress Figure 32-Pin Plastic Leaded Chip Carrier J65 51-85002 *C Page 13 of 15 [+] Feedback CY7B9911 RoboClock+ Document History Page Document Title CY7B9911 RoboClock+ Programmable Skew Clock Buffer Document Number 38-07209 Orig. of Submission Change Description of Change 110342 12/21/01 Change from Specification number 38-00623 to 38-07209 1199925 KVM/AESA See ECN Added Tape and Reel part in Ordering Information Added note Not recommended for the new design 1286064 AESA See ECN Change status to final 2593494 CXQ/PYRS 10/20/08 Changed unit of measurement in the Electrical Characteristics table for parameters IIH, IIL, IIHH, IIMM, and IILL 2761988 09/10/09 Changed “Pb” to “lead” in package type section of Ordering Information. 2894070 03/17/2010 Added Table of Contents Removed part number in Ordering Information. Removed Note “Not recommended for the new design.” Updated Package Diagram Figure 12 Updated Sales, Solutions, and Legal Information 3076920 11/02/2010 Added Ordering Code Definitions. Page 14 of 15 [+] Feedback CY7B9911 RoboClock+ Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/plc cypress.com/go/memory cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless PSoC Solutions psoc.cypress.com/solutions PSoC 1 \| PSoC 3 \| PSoC 5 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Page 15 of 15 Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback

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CY7B9911 RoboClock+

Programmable Skew Clock Buffer
• All Output Pair Skew <100 ps Typical 250 max
• MHz to 100 MHz Output Operation
• User Selectable Output Functions

Selectable Skew to 18 ns Inverted and Non-inverted Operation at and ¼ Input Frequency Operation at 2x and 4x Input Frequency input as low as

MHz
• Zero Input to Output Delay
• 50% Duty Cycle Outputs
• Outputs Drive terminated lines
• Low Operating Current
• 32-pin PLCC/LCC Package
• Jitter <200 ps Peak-to-peak <25 ps RMS

Logic Block Diagram

TEST

Functional Description

The CY7B9911 High Speed Programmable Skew Clock Buffer PSCB offers user selectable control over system clock functions. This multiple output clock driver provides the system integrator with functions necessary to optimize the timing of high performance computer systems. Each of the eight individual TTL drivers, arranged in four pairs of user controllable outputs, can drive terminated transmission lines with impedances as low as They deliver minimal and specified output skews and full swing logic levels. Each output is hardwired to one of nine delay or function configurations. Delay increments of to ns are determined by the operating frequency with outputs able to skew up to ±6 time units from their nominal “zero” skew position. The completely integrated PLL allows cancellation of external load and transmission line delay effects. When this “zero delay” capability of the PSCB is combined with the selectable output skew functions, you can create output-to-output delays of up to ±12 time units. Divide-by-two and divide-by-four output functions are provided for additional flexibility in designing complex clock systems. When combined with the internal PLL, these divide functions enable distribution of a low frequency clock that is multiplied by two or four at the clock destination. This facility minimizes clock distribution difficulty enabling maximum system clock speed and flexibility.

FB REF

PHASE

FREQ FILTER DET

VCO AND TIME UNIT GENERATOR

SELECT

INPUTS

THREE

LEVEL 3F0

SKEW
3F1 3Q1

SELECT
2Q0 2F0

MATRIX
1F1 1Q1
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY7B9911 RoboClock+

Contents
1 Functional 1 Logic Block 1 Contents 2 Pin Configuration 3 Block Diagram 4

Phase Frequency Detector and Filter.......................... 4 VCO and Time Unit Generator 4 Skew Select 4 Test 5 Maximum 5 Operating 6
Electrical 6 Capacitance 7 AC Timing Diagrams 9 Operational Mode Descriptions 10 Ordering 13 Package 13 Document History Page 14 Sales, Solutions, and Legal Information 15

Worldwide Sales and Design Support....................... 15 Products 15 PSoC Solutions 15

Page 2 of 15 [+] Feedback

Pin Configuration

Figure Pin Configuration 32-Pin PLCC/LCC Package

CY7B9911 RoboClock+
3F0 FS VCCQ REF GND TEST 2F1
3F1 4F0 4F1 VCCQ VCCN 4Q1 4Q0 GND
4 3 2 1 32 31 30

CY7B9911 25
14 15 16 17 18 19 20
2F0 GND 1F1 1F0 VCCN 1Q0 1Q1 GND
3Q1 3Q0 V

FB VCCN 2Q1 2Q0

Table Pin Definition

Signal Name

FB FS 1F0, 1F1 2F0, 2F1 3F0, 3F1 4F0, 4F1 TEST 1Q0, 1Q1 2Q0, 2Q1 3Q0, 3Q1 4Q0, 4Q1 VCCN VCCQ GND

I O PWR

Description Reference frequency input. This input supplies the frequency and timing against which all functional variation is measured. PLL feedback input typically connected to one of the eight outputs . Three level frequency range select. See Table Three level function select inputs for output pair 1 1Q0, 1Q1 . See Table Three level function select inputs for output pair 2 2Q0, 2Q1 . See Table 3 Three level function select inputs for output pair 3 3Q0, 3Q1 . See Table 3 Three level function select inputs for output pair 4 4Q0, 4Q1 . See Table 3 Three level select. See test mode section under the block diagram descriptions. Output pair See Table Output pair See Table Output pair See Table Output pair See Table Power supply for output drivers. Power supply for internal circuitry. Ground.

Page 3 of 15 [+] Feedback

CY7B9911 RoboClock+

Block Diagram Description

Phase Frequency Detector and Filter The Phase Frequency Detector and Filter blocks accept inputs from the reference frequency REF input and the feedback FB input. They generate correction information to control the frequency of the Voltage controlled Oscillator VCO . These blocks, along with the VCO, form a Phase Locked Loop PLL that tracks the incoming REF signal.

VCO and Time Unit Generator The VCO accepts analog control inputs from the PLL filter block and generates a frequency that is used by the time unit generator to create discrete time units that are selected in the skew select matrix. The operational range of the VCO is determined by the FS control pin. The time unit tU is determined by the operating frequency of the device and the level of the FS pin as shown in Table

Table Frequency Range Select and tU Calculation[1]

FS[2,3]
fNOM MHz Min Max
tU = N =

Approximate Frequency MHz At Which tU = ns

LOW 15 30
25 50

HIGH 40 100

Skew Select Matrix

The skew select matrix contains four independent sections. Each section has two low skew, high fanout drivers xQ0, xQ1 , and two corresponding three level function select xF0, xF1 inputs. Table 3 shows the nine possible output functions for each section as determined by the function select inputs. All times are measured with respect to the REF input assuming that the output connected to the FB input has 0tU selected.

Table Programmable Skew Configurations[1]

Function Selects

Output Functions
1F1, 2F1, 1F0, 2F0, 1Q0, 1Q1, 3F1, 4F1 3F0, 4F0 2Q0, 2Q1
3Q0, 3Q1
4Q0, 4Q1

LOW MID HIGH
Ordering Information

Accuracy ps 500
Ordering Code
Ordering Code Definitions CY 7B9911 - 5 J C T

Package Type
32-pin Plastic Leaded Chip Carrier 32-pin Plastic Leaded Chip Carrier - Tape and Reel

Operating Range

Commercial

Package Diagram

T = Tape and Reel, Blank = Standard Temperature Range C = Commercial = 0 °C to 70 °C Package Type J = Plastic Leaded Chip Carrier Propagation delay 5 = 500 ps max Base part number Company ID CY = Cypress

Figure 32-Pin Plastic Leaded Chip Carrier J65
51-85002 *C

Page 13 of 15 [+] Feedback

CY7B9911 RoboClock+

Document History Page

Document Title CY7B9911 RoboClock+ Programmable Skew Clock Buffer Document Number 38-07209

Orig. of Submission

Change

Description of Change
110342
12/21/01 Change from Specification number 38-00623 to 38-07209
1199925 KVM/AESA See ECN Added Tape and Reel part in Ordering Information

Added note Not recommended for the new design
1286064

AESA

See ECN Change status to final
2593494 CXQ/PYRS 10/20/08 Changed unit of measurement in the Electrical Characteristics table for
parameters IIH, IIL, IIHH, IIMM, and IILL
2761988
09/10/09 Changed “Pb” to “lead” in package type section of Ordering Information.
2894070
03/17/2010 Added Table of Contents
Removed part number in Ordering Information.

Removed Note “Not recommended for the new design.”

Updated Package Diagram Figure 12

Updated Sales, Solutions, and Legal Information
3076920
11/02/2010 Added Ordering Code Definitions.

Page 14 of 15 [+] Feedback

CY7B9911 RoboClock+

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations.

Products Automotive Clocks & Buffers Interface Lighting & Power Control

Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF
cypress.com/go/automotive cypress.com/go/clocks
cypress.com/go/interface cypress.com/go/powerpsoc
cypress.com/go/plc cypress.com/go/memory
cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB
cypress.com/go/wireless

PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Page 15 of 15

Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders.
[+] Feedback

More datasheets: 5.46167.2270209 | 5.46.169.2270209 | 5.46001.0570209 | 5.46001.0590209 | 5.46167.0440209 | 5.46167.0430209 | 5.46167.0920209 | 5.46167.0910209 | 5.46169.0440209 | 5.46169.0430209

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY7B9911-5JC Datasheet file may be downloaded here without warranties.

Datasheet ID: CY7B9911-5JC 507843