AOZ1051PI
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AOZ1051PI_2 (pdf) |
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AOZ1051PI EZBuck 3 A Synchronous Buck Regulator Not Recommended For New Designs The AOZ1051PI is a high efficiency, easy to use, 3 A z V to 18 V operating input voltage range synchronous buck regulator. The AOZ1051PI works from z Synchronous Buck 70 internal high-side switch V to 18 V input voltage range, and provides up to 3 A of continuous output current with an output voltage adjustable down to V. The AOZ1051PI comes in an exposed pad SO-8 package and is rated over a -40 °C to +85 °C operating ambient temperature range. Replacement Part: and 40 internal low-side switch at 12 V z Up to 95 % efficiency s z External soft start ign z Output voltage adjustable to V z 3 A continuous output current s z 500 kHz PWM operation De z Cycle-by-cycle current limit AOZ3013PI same package ded For New AOZ3103DI smaller package z Pre-bias start-up z Short-circuit protection z Thermal shutdown z Exposed pad SO-8 package z Point of load DC/DC converters z LCD TV z Set top boxes z DVD and Blu-ray players/recorders z Cable modems men Typical Application om VIN c C1 Not Re10µF AOZ1051PI LX COMP L1 4.7µH R1 VOUT C2, C3 22µF AGND PGND Figure V 3 A Synchronous Buck Regulator, Fs = 500 kHz Page 1 of 14 Ordering Information Part Number AOZ1051PI Ambient Temperature Range -40 °C to +85 °C Package EPAD SO-8 AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit for additional information. AOZ1051PI Environmental Green Product Pin Configuration PGND 1 VIN 2 AGND 3 PAD LX 8 NC 7 SS 6 EN Designs 5 COMP ew Exposed Pad SO-8 Top View For N Pin Description ed Pin Number d 1 n 2 Pin Name PGND VIN AGND COMP Pin Function Power ground. PGND needs to be electrically connected to AGND. Supply voltage input. When VIN rises above the UVLO threshold and EN is logic high, the device starts up. Analog ground. AGND is the reference point for controller section. AGND needs to be electrically connected to PGND. Feedback input. The FB pin is used to set the output voltage via a resistive voltage divider between the output and AGND. External loop compensation pin. Connect a RC network between COMP and AGND to compensate the control loop. Enable pin. Pull EN to logic high to enable the device. Pull EN to logic low to disable the device. If on/off control in not needed, connect EN to VIN and do not leave it open. Soft-start pin. 5 µA current charging current. No Connect Pin. Pin 8 is not internally connected. Connect this pin externally to LX and use it for better thermal performance. Exposed pad Switching node. LX is the drain of the internal PFET. LX is used as the thermal pad of the power stage. Page 2 of 14 Block Diagram AOZ1051PI UVLO 5V LDO Internal & POR Regulator |
More datasheets: PSCE242K-R090C | AT25DL081-MHN-T | AT25DL081-MHN-Y | AT25DL081-SSHN-T | AT25DL081-SSHN-B | 277200110203002 | 677200263300675 | 462 | FQB55N06TM | OP290GPZ |
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