NDT451N N-Channel Enhancement Mode Field Effect Transistor
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September 1996 NDT451N N-Channel Enhancement Mode Field Effect Transistor Power SOT N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed. 5.5A, 30V. RDS ON = VGS = 10V. High density cell design for extremely low RDS ON . High power and current handling capability in a widely used surface mount package. Absolute Maximum Ratings Symbol Parameter TA = 25°C unless otherwise noted VDSS Drain-Source Voltage VGSS Gate-Source Voltage Drain Current - Continuous - Pulsed Maximum Power Dissipation Note 1a Note 1a Note 1b Note 1c TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case * Order option J23Z for cropped center drain lead. Note 1a Note 1 NDT451N 30 ±20 ±25 3 -65 to 150 42 12 1997 Fairchild Semiconductor Corporation Units V A W °C °C/W °C/W Electrical Characteristics TA = 25°C unless otherwise noted Symbol Parameter Conditions OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = 250 µA VDS = 24 V, VGS = 0 V IGSSF Gate - Body Leakage, Forward IGSSR ON CHARACTERISTICS Note 2 VGS th Gate Threshold Voltage |
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