NDS9400A

NDS9400A Datasheet

NDS9400A Single P-Channel Enhancement Mode Field Effect Transistor

Part	Datasheet
NDS9400A	NDS9400A (pdf)

PDF Datasheet Preview
NDS9400A Single P-Channel Enhancement Mode Field Effect Transistor February 1996 These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features -3.4A, -30V. RDS ON = VGS = -10V. High density cell design for extremely low RDS ON . High power and current handling capability in a widely used surface mount package. Rugged and reliable. Absolute Maximum Ratings Symbol Parameter TA= 25°C unless otherwise noted VDSS Drain-Source Voltage VGSS Gate-Source Voltage Drain Current - Continuous - Pulsed Note 1a Maximum Power Dissipation Note 1a Note 1b Note 1c TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Note 1a Thermal Resistance, Junction-to-Case Note 1 1997 Fairchild Semiconductor Corporation NDS9400A -30 ± 20 ± ± 10 1 -55 to 150 50 25 Units V A W °C °C/W °C/W NDS9400A.SAM Electrical Characteristics TA = 25°C unless otherwise noted Symbol Parameter Conditions OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 µA VDS = -24 V, VGS = 0 V IGSSF Gate - Body Leakage, Forward IGSSR ON CHARACTERISTICS Note 2 VGS th Gate Threshold Voltage VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V

PDF Datasheet Preview

NDS9400A Single P-Channel Enhancement Mode Field Effect Transistor

February 1996

These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.

Features -3.4A, -30V. RDS ON = VGS = -10V. High density cell design for extremely low RDS ON . High power and current handling capability in a widely used surface mount package.

Rugged and reliable.

Absolute Maximum Ratings

Symbol Parameter

TA= 25°C unless otherwise noted

VDSS

Drain-Source Voltage

VGSS

Gate-Source Voltage

Drain Current - Continuous
- Pulsed

Note 1a

Maximum Power Dissipation

Note 1a Note 1b

Note 1c

TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS

Thermal Resistance, Junction-to-Ambient Note 1a Thermal Resistance, Junction-to-Case Note 1
1997 Fairchild Semiconductor Corporation

NDS9400A -30 ± 20 ± ± 10 1
-55 to 150
50 25

Units V A W
°C °C/W °C/W

NDS9400A.SAM

Electrical Characteristics TA = 25°C unless otherwise noted

Symbol Parameter

Conditions

OFF CHARACTERISTICS

BVDSS IDSS

Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current

VGS = 0 V, ID = -250 µA VDS = -24 V, VGS = 0 V

IGSSF

Gate - Body Leakage, Forward

IGSSR

ON CHARACTERISTICS Note 2

VGS th

Gate Threshold Voltage

VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived NDS9400A Datasheet file may be downloaded here without warranties.

Datasheet ID: NDS9400A 634621