NDP7061

NDP7061 Datasheet

NDP7061 / NDB7061 N-Channel Enhancement Mode Field Effect Transistor

Part	Datasheet
NDP7061	NDP7061 (pdf)

PDF Datasheet Preview
May 1996 NDP7061 / NDB7061 N-Channel Enhancement Mode Field Effect Transistor These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide 64A, 60V. RDS ON = VGS=10V. Critical DC electrical parameters specified at elevated temperature. superior switching performance, and withstand high energy Rugged internal source-drain diode can eliminate the need pulses in the avalanche and commutation modes. These for an external Zener diode transient suppressor. devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and 175°C maximum junction temperature rating. other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. High density cell design for extremely low RDS ON . TO-220 and TO-263 D2PAK package for both through hole and surface mount applications. Absolute Maximum Ratings Symbol Parameter TC = 25°C unless otherwise noted NDP7061 VDSS Drain-Source Voltage VDGR Drain-Gate Voltage RGS < 1 VGSS Gate-Source Voltage - Continuous - Nonrepetitive tP < 50 µs Drain Current - Continuous - Pulsed Maximum Power Dissipation TC = 25°C Derate above 25°C TJ,TSTG TL Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 60 ± 20 ± 40 64 190 130 -65 to 175 275 NDB7061 Units V W/°C °C °C 1997 Fairchild Semiconductor Corporation Electrical Characteristics TC = 25°C unless otherwise noted Symbol Parameter Conditions W DSS

PDF Datasheet Preview

May 1996

NDP7061 / NDB7061 N-Channel Enhancement Mode Field Effect Transistor

These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide
64A, 60V. RDS ON = VGS=10V.

Critical DC electrical parameters specified at elevated temperature.
superior switching performance, and withstand high energy

Rugged internal source-drain diode can eliminate the need
pulses in the avalanche and commutation modes. These
for an external Zener diode transient suppressor.
devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and
175°C maximum junction temperature rating.
other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.

High density cell design for extremely low RDS ON . TO-220 and TO-263 D2PAK package for both through hole
and surface mount applications.

Absolute Maximum Ratings

Symbol Parameter

TC = 25°C unless otherwise noted NDP7061

VDSS

Drain-Source Voltage

VDGR

Drain-Gate Voltage RGS < 1

VGSS

Gate-Source Voltage - Continuous
- Nonrepetitive tP < 50 µs

Drain Current - Continuous
- Pulsed

Maximum Power Dissipation TC = 25°C

Derate above 25°C

TJ,TSTG TL

Operating and Storage Temperature Range

Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
60 ± 20 ± 40 64 190 130 -65 to 175 275

NDB7061

Units V

W/°C
°C °C
1997 Fairchild Semiconductor Corporation

Electrical Characteristics TC = 25°C unless otherwise noted

Symbol Parameter

Conditions

W DSS

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Datasheet ID: NDP7061 634602