NDB7051

NDB7051 Datasheet

NDP7051 / NDB7051 N-Channel Enhancement Mode Field Effect Transistor

Part	Datasheet
NDB7051	NDB7051 (pdf)

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August 1996 NDP7051 / NDB7051 N-Channel Enhancement Mode Field Effect Transistor These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. 70A, 50V. RDS ON = VGS=10V. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. 175°C maximum junction temperature rating. High density cell design for extremely low RDS ON . TO-220 and TO-263 D2PAK package for both through hole and surface mount applications. Absolute Maximum Ratings Symbol Parameter TC = 25°C unless otherwise noted NDP7051 VDSS Drain-Source Voltage VDGR Drain-Gate Voltage RGS < 1 VGSS Gate-Source Voltage - Continuous - Nonrepetitive tP < 50 µs Drain Current - Continuous - Pulsed Maximum Power Dissipation TC = 25°C Derate above 25°C TJ,TSTG TL Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 50 ± 20 ± 40 70 210 130 -65 to 175 275 NDB7051 Units V W/°C °C °C 1997 Fairchild Semiconductor Corporation Electrical Characteristics TC = 25°C unless otherwise noted Symbol Parameter Conditions W DSS Single Pulse Drain-Source Avalanche Energy VDD = 25 V, ID = 70 A Maximum Drain-Source Avalanche Current OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current

PDF Datasheet Preview

August 1996

NDP7051 / NDB7051 N-Channel Enhancement Mode Field Effect Transistor

These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
70A, 50V. RDS ON = VGS=10V.

Critical DC electrical parameters specified at elevated temperature.

Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.

High density cell design for extremely low RDS ON . TO-220 and TO-263 D2PAK package for both through hole and surface mount applications.

Absolute Maximum Ratings

Symbol Parameter

TC = 25°C unless otherwise noted NDP7051

VDSS

Drain-Source Voltage

VDGR

Drain-Gate Voltage RGS < 1

VGSS

Gate-Source Voltage - Continuous
- Nonrepetitive tP < 50 µs

Drain Current - Continuous
- Pulsed

Maximum Power Dissipation TC = 25°C

Derate above 25°C

TJ,TSTG TL

Operating and Storage Temperature Range

Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
50 ± 20 ± 40 70 210 130 -65 to 175 275

NDB7051

Units V

W/°C
°C °C
1997 Fairchild Semiconductor Corporation

Electrical Characteristics TC = 25°C unless otherwise noted

Symbol Parameter

Conditions

W DSS

Single Pulse Drain-Source Avalanche Energy

VDD = 25 V, ID = 70 A

Maximum Drain-Source Avalanche Current

OFF CHARACTERISTICS

BVDSS IDSS

Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current

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Datasheet ID: NDB7051 634600