NDP4060

NDP4060 Datasheet

NDP4060 / NDB4060 N-Channel Enhancement Mode Field Effect Transistor

Part	Datasheet
NDP4060	NDP4060 (pdf)

Related Parts	Information
NDB4060	NDB4060

PDF Datasheet Preview
July 1996 NDP4060 / NDB4060 N-Channel Enhancement Mode Field Effect Transistor These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. 15A, 60V. RDS ON = VGS=10V. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. 175°C maximum junction temperature rating. High density cell design for extremely low RDS ON . TO-220 and TO-263 D2PAK package for both through hole and surface mount applications. Absolute Maximum Ratings Symbol Parameter TC = 25°C unles otherwise noted NDP4060 VDSS Drain-Source Voltage VDGR Drain-Gate Voltage RGS < 1 VGSS Gate-Source Voltage - Continuous - Nonrepetitive tP < 50 µs Drain Current - Continuous - Pulsed Total Power Dissipation Derate above 25°C TJ,TSTG TL Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 60 ± 20 ± 40 ± 15 ± 45 50 -65 to 175 275 NDB4060 Units V W/°C °C °C 1997 Fairchild Semiconductor Corporation Electrical Characteristics TC = 25°C unless otherwise noted Symbol Parameter Conditions DRAIN-SOURCE AVALANCHE RATINGS Note 1 W DSS Single Pulse Drain-Source Avalanche Energy VDD = 25 V, ID = 15 A Maximum Drain-Source Avalanche Current OFF CHARACTERISTICS BVDSS IDSS

PDF Datasheet Preview

July 1996

NDP4060 / NDB4060 N-Channel Enhancement Mode Field Effect Transistor

These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
15A, 60V. RDS ON = VGS=10V.

Critical DC electrical parameters specified at elevated temperature.

Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.

High density cell design for extremely low RDS ON . TO-220 and TO-263 D2PAK package for both through hole and surface mount applications.

Absolute Maximum Ratings

Symbol Parameter

TC = 25°C unles otherwise noted NDP4060

VDSS

Drain-Source Voltage

VDGR

Drain-Gate Voltage RGS < 1

VGSS

Gate-Source Voltage - Continuous
- Nonrepetitive tP < 50 µs

Drain Current - Continuous
- Pulsed

Total Power Dissipation

Derate above 25°C

TJ,TSTG TL

Operating and Storage Temperature Range

Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
60 ± 20 ± 40 ± 15 ± 45 50 -65 to 175 275

NDB4060

Units V

W/°C
°C °C
1997 Fairchild Semiconductor Corporation

Electrical Characteristics TC = 25°C unless otherwise noted

Symbol Parameter

Conditions

DRAIN-SOURCE AVALANCHE RATINGS Note 1

W DSS

Single Pulse Drain-Source Avalanche Energy

VDD = 25 V, ID = 15 A

Maximum Drain-Source Avalanche Current

OFF CHARACTERISTICS

BVDSS IDSS

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Datasheet ID: NDP4060 634587