DS1642-70+

DS1642-70+ Datasheet

DS1642 Nonvolatile Timekeeping RAM

Part	Datasheet
DS1642-70+	DS1642-70+ (pdf)

Related Parts	Information
DS1642-70	DS1642-70

PDF Datasheet Preview
DS1642 Nonvolatile Timekeeping RAM • Integrated NV SRAM, Real-Time Clock, Crystal, Power-Fail Control Circuit, and Lithium Energy Source • Standard JEDEC Bytewide 2k x 8 Static RAM Pinout • Clock Registers are Accessed Identically to the Static RAM. These Registers are Resident in the Eight Top RAM Locations • Totally Nonvolatile with Over 10 Years of Operation in the Absence of Power • Access Times of 70ns and 100ns • Quartz Accuracy ±1 Minute a Month at +25°C, Factory Calibrated • BCD-Coded Year, Month, Date, Day, Hours, Minutes, and Seconds with Leap Year Compensation Valid Up to 2100 • Power-Fail Write Protection Allows for ±10% VCC Power Supply Tolerance • Lithium Energy Source is Electrically Disconnected to Retain Freshness Until Power is Applied for the First Time • UL Recognized PIN CONFIGURATION TOP VIEW A6 2 DS1642 23 DQ0 9 DQ1 10 DQ2 11 GND 12 VCC A8 A9 WE OE A10 CE DQ7 DQ6 DQ5 DQ4 DQ3 ENCAPSULATED DIP ORDERING INFORMATION VOLTAGE PART RANGE TEMP RANGE DS1642-70+ 0°C to +70°C DS1642-70 0°C to +70°C DS1642-100+ 0°C to +70°C DS1642-100 0°C to +70°C PIN-PACKAGE TOP MARK 24 EDIP 0.720a 24 EDIP 0.720a 24 EDIP 0.720a 24 EDIP 0.720a DS1642+70 DS1642-70 DS1642+100 DS1642-100 *DS9034-PCX, DS9034I-PCX, DS9034-PCX+ required must be ordered separately . A “+" indicates a lead Pb -free product. The top mark will include a “+” symbol on lead-free devices. 1 of 11 PIN DESCRIPTION PIN NAME FUNCTION A2 Address Input 13 14 DQ3 DQ4 Data Input/Output GND Ground CE Active-Low Chip-Enable Input OE Active-Low Output-Enable Input WE Active-Low Write-Enable Input VCC Power-Supply Input DS1642 The DS1642 is a 2k x 8 nonvolatile static RAM and a full-function real-time clock RTC , both of which are accessible in a bytewide format. The nonvolatile time keeping RAM is pin and function equivalent to any JEDEC-standard 2k x 8 SRAM. The device can also be easily substituted in ROM, EPROM, and EEPROM sockets, providing read/write nonvolatility and the addition of the real-time clock function. The real-time clock information resides in the eight uppermost RAM locations. The RTC registers contain year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for the day of the month and leap year are made automatically. The RTC clock registers are double-buffered to avoid access of incorrect data that can occur during clock update cycles. The double-buffered system also prevents time loss as the timekeeping countdown continues unabated by access to time register data. The DS1642 also contains its own power-fail circuitry, which deselects the device when the VCC supply is in an out-of-tolerance condition. This feature prevents loss of data from unpredictable system operation brought on by low VCC as errant access and update cycles are avoided. 2 of 12 DS1642 CLOCK THE CLOCK While the double-buffered register structure reduces the chance of reading incorrect data, internal updates to the DS1642 clock registers should be halted before clock data is read to prevent reading of data in transition. However, halting the internal clock register updating process does not affect clock accuracy. Updating is halted when a 1 is written into the read bit, the 7th most significant bit in the control register. As long as a 1 remains in that position, updating is halted. After a halt is issued, the registers reflect the count, that is day, date, and time that was current at the moment the halt command was issued. However, the internal clock registers of the double-buffered system continue to update so that the clock accuracy is not affected by the access of data. All of the DS1642 registers are updated simultaneously after the clock status is reset. Updating occurs within a second after the read bit is written to Figure DS1642 BLOCK DIAGRAM Table TRUTH TABLE 5V ±10% <4.5V > VBAT <VBAT CE OE WE VIH X

PDF Datasheet Preview

DS1642 Nonvolatile Timekeeping RAM
• Integrated NV SRAM, Real-Time Clock,

Crystal, Power-Fail Control Circuit, and

Lithium Energy Source
• Standard JEDEC Bytewide 2k x 8 Static

RAM Pinout
• Clock Registers are Accessed Identically to
the Static RAM. These Registers are

Resident in the Eight Top RAM Locations
• Totally Nonvolatile with Over 10 Years of

Operation in the Absence of Power
• Access Times of 70ns and 100ns
• Quartz Accuracy ±1 Minute a Month at
+25°C, Factory Calibrated
• BCD-Coded Year, Month, Date, Day, Hours,

Minutes, and Seconds with Leap Year

Compensation Valid Up to 2100
• Power-Fail Write Protection Allows for
±10% VCC Power Supply Tolerance
• Lithium Energy Source is Electrically

Disconnected to Retain Freshness Until

Power is Applied for the First Time
• UL Recognized

PIN CONFIGURATION

TOP VIEW

A6 2 DS1642 23

DQ0 9

DQ1 10

DQ2 11

GND 12

VCC A8 A9 WE OE A10 CE DQ7 DQ6 DQ5 DQ4 DQ3

ENCAPSULATED DIP
ORDERING INFORMATION

VOLTAGE

PART

RANGE TEMP RANGE

DS1642-70+
0°C to +70°C

DS1642-70
0°C to +70°C

DS1642-100+
0°C to +70°C

DS1642-100
0°C to +70°C

PIN-PACKAGE TOP MARK
24 EDIP 0.720a 24 EDIP 0.720a 24 EDIP 0.720a 24 EDIP 0.720a

DS1642+70 DS1642-70 DS1642+100 DS1642-100
*DS9034-PCX, DS9034I-PCX, DS9034-PCX+ required must be ordered separately . A “+" indicates a lead Pb -free product. The top mark will include a “+” symbol on lead-free devices.
1 of 11

PIN DESCRIPTION

PIN NAME

FUNCTION

A2 Address Input
13 14

DQ3 DQ4

Data Input/Output

GND Ground

CE Active-Low Chip-Enable Input

OE Active-Low Output-Enable Input

WE Active-Low Write-Enable Input

VCC Power-Supply Input

DS1642

The DS1642 is a 2k x 8 nonvolatile static RAM and a full-function real-time clock RTC , both of which are accessible in a bytewide format. The nonvolatile time keeping RAM is pin and function equivalent to any JEDEC-standard 2k x 8 SRAM. The device can also be easily substituted in ROM, EPROM, and EEPROM sockets, providing read/write nonvolatility and the addition of the real-time clock function. The real-time clock information resides in the eight uppermost RAM locations. The RTC registers contain year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for the day of the month and leap year are made automatically. The RTC clock registers are double-buffered to avoid access of incorrect data that can occur during clock update cycles. The double-buffered system also prevents time loss as the timekeeping countdown continues unabated by access to time register data. The DS1642 also contains its own power-fail circuitry, which deselects the device when the VCC supply is in an out-of-tolerance condition. This feature prevents loss of data from unpredictable system operation brought on by low VCC as errant access and update cycles are avoided.
2 of 12

DS1642

CLOCK THE CLOCK

While the double-buffered register structure reduces the chance of reading incorrect data, internal updates to the DS1642 clock registers should be halted before clock data is read to prevent reading of data in transition. However, halting the internal clock register updating process does not affect clock accuracy. Updating is halted when a 1 is written into the read bit, the 7th most significant bit in the control register. As long as a 1 remains in that position, updating is halted. After a halt is issued, the registers reflect the count, that is day, date, and time that was current at the moment the halt command was issued. However, the internal clock registers of the double-buffered system continue to update so that the clock accuracy is not affected by the access of data. All of the DS1642 registers are updated simultaneously after the clock status is reset. Updating occurs within a second after the read bit is written to

Figure DS1642 BLOCK DIAGRAM

Table TRUTH TABLE
5V ±10%
<4.5V > VBAT <VBAT

CE OE WE

VIH X

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Datasheet ID: DS1642-70+ 647160