MM80C95N
MM80C95N Datasheet
MM80C95<br>• MM80C97<br>• MM80C98 3-STATE Hex Buffers<br>• 3-STATE Hex Inverters
| Part | Datasheet |
|---|---|
MM80C95N |
MM80C95N (pdf) |
| Related Parts | Information |
|---|---|
MM80C98N |
MM80C98N |
MM80C97N |
MM80C97N |
| PDF Datasheet Preview |
|---|
| MM80C95 • MM80C97 • MM80C98 3-STATE Hex Buffers • 3-STATE Hex Inverters MM80C95 • MM80C97 • MM80C98 3-STATE Hex Buffers • 3-STATE Hex Inverters The MM80C95, MM80C97 and MM80C98 gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. The MM80C95 and the MM80C97 convert CMOS or TTL outputs to 3-STATE outputs with no logic inversion, the MM80C98 provides the logical opposite of the input signal. The MM80C95 has common 3-STATE controls for all six devices. The MM80C97 and the MM80C98 have two 3-STATE controls one for two devices and one for the other four devices. Inputs are protected from damage due to static discharge by diode clamps to VCC and GND. s Wide supply voltage range 3.0V to 15V s Guaranteed noise margin 1.0V s High noise immunity VCC typ. s TTL compatible Drive 1 TTL Load • Bus drivers Typical propagation delay into 150 pF load is 40 ns Ordering Code: Order Number Package Number Package Description MM80C95N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide MM80C97M M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow MM80C97N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide MM80C98N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams Pin Assignments for DIP MM80C95 MM80C97 Top View MM80C98 Top View Top View 1999 Fairchild Semiconductor Corporation DS005907.prf MM80C95 • MM80C97 • MM80C98 Schematic Diagrams MM80C95 3-STATE MM80C97 3-STATE MM80C98 3-STATE Truth Tables MM80C95 Disable DIS1 0 1 Input DIS2 0 1 0 1 Input Output 0 1 H-z H-z H-z Disable DIS4 0 X 1 MM80C97 Input DIS2 Input Output 0 1 H-z Note 1 H-z Note 2 MM80C98 Disable DIS4 0 X 1 Input DIS2 Input X = Irrelevant Note 1 Output only Note 2 Output only Output 1 0 H-z Note 1 H-z Note 2 MM80C95 • MM80C97 • MM80C98 Absolute Maximum Ratings Note 3 Voltage at Any Pin Operating Temperature Range Storage Temperature Range Power Dissipation PD Dual-In-Line Small Outline −0.3V to VCC + 0.3V −40°C to +85°C −65°C to +150°C |
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