MM74HC4020<br>• MM74HC4040 14-Stage Binary Counter<br>• 12-Stage Binary Counter
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MM74HC4020N (pdf) |
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MM74HC4040M |
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MM74HC4040N |
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MM74HC4040MTCX |
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MM74HC4040SJX |
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MM74HC4040MTC |
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MM74HC4040SJ |
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MM74HC4020 • MM74HC4040 14-Stage Binary Counter • 12-Stage Binary Counter MM74HC4020 • MM74HC4040 14-Stage Binary Counter • 12-Stage Binary Counter The MM74HC4020, MM74HC4040, are high speed binary ripple carry counters. These counters are implemented utilizing advanced silicon-gate CMOS technology to achieve speed performance similar to LS-TTL logic while retaining the low power and high noise immunity of CMOS. The MM74HC4020 is a 14 stage counter and the MM74HC4040 is a 12-stage counter. Both devices are incremented on the falling edge negative transition of the input clock, and all their outputs are reset to a low level by applying a logical high on their reset input. These devices are pin equivalent to the CD4020 and CD4040 respectively. All inputs are protected from damage due to static discharge by protection diodes to VCC and ground. s Typical propagation delay 16 ns s Wide operating voltage range s Low input current 1 µA maximum s Low quiescent current 80 µA maximum 74HC Series s Output drive capability 10 LS-TTL loads Ordering Code: Order Number Package Number Package Description MM74HC4020M Note 1 M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow MM74HC4020SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide MM74HC4020N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide MM74HC4040M Note 1 M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow MM74HC4040SJ Note 1 M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide MM74HC4040MTC Note 1 MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide MM74HC4040N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Note 1 Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams MM74HC4020 2003 Fairchild Semiconductor Corporation DS005216 MM74HC4040 MM74HC4020 • MM74HC4040 Logic Diagrams MM74HC4020 MM74HC4040 MM74HC4020 • MM74HC4040 Absolute Maximum Ratings Note 2 Note 3 Supply Voltage VCC DC Input Voltage VIN DC Output Voltage VOUT Clamp Diode Current ICD DC Output Current, per pin IOUT DC VCC or GND Current, per pin ICC Storage Temperature Range TSTG Power Dissipation PD Note 4 S.O. Package only Lead Temperature TL Soldering 10 seconds to +7.0V to VCC +1.5V to VCC +0.5V ±20 mA ±25 mA ±50 mA −65°C to +150°C 600 mW 500 mW 260°C Recommended Operating Conditions Min Max Units Supply Voltage VCC DC Input or Output Voltage VIN, VOUT Operating Temperature Range TA −40 +85 Input Rise or Fall Times tr, tf VCC = 2.0V 1000 ns VCC = 4.5V VCC = 6.0V Note 2 Maximum Ratings are those values beyond which damage to the device may occur. Note 3 Unless otherwise specified all voltages are referenced to ground. Note 4 Power Dissipation temperature derating plastic “N” package − 12 mW/°C from 65°C to 85°C. DC Electrical Characteristics Note 5 Parameter Conditions TA = 25°C TA = −40 to 85°C TA = −55 to 125°C Units Guaranteed Limits Minimum HIGH Level Input |
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