MM74C925<br>• MM74C926<br>• MM74C927<br>• MM74C928 4-Digit Counters with Multiplexed 7-Segment Output Drivers
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MM74C925N (pdf) |
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MM74C926N |
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MM74C927N |
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MM74C928N |
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MM74C925 • MM74C926 • MM74C927 • MM74C928 4-Digit Counters with Multiplexed 7-Segment Output Drivers MM74C925 • MM74C926 • MM74C927 • MM74C928 4-Digit Counters with Multiplexed 7-Segment Output Drivers The MM74C925, MM74C926, MM74C927 and MM74C928 CMOS counters consist of a 4-digit counter, an internal output latch, NPN output sourcing drivers for a 7-segment display, and an internal multiplexing circuitry with four multiplexing outputs. The multiplexing circuit has its own free-running oscillator, and requires no external clock. The counters advance on negative edge of clock. A HIGH signal on the Reset input will reset the counter to zero, and reset the carry-out LOW. A LOW signal on the Latch Enable input will latch the number in the counters into the internal output latches. A HIGH signal on Display Select input will select the number in the counter to be displayed a LOW level signal on the Display Select will select the number in the output latch to be displayed. The MM74C925 is a 4-decade counter and has Latch Enable, Clock and Reset inputs. The MM74C926 is like the MM74C925 except that it has a display select and a carry-out used for cascading counters. The carry-out signal goes HIGH at 6000, goes back LOW at The MM74C927 is like the MM74C926 except the second most significant digit divides by 6 rather than Thus, if the clock input frequency is 10 Hz, the display would read tenths of seconds and minutes i.e., The MM74C928 is like the MM74C926 except the most significant digit divides by 2 rather than 10 and the carry-out is an overflow indicator which is HIGH at 2000, and it goes back LOW only when the counter is reset. Thus, this is a counter. s Wide supply voltage range 3V to 6V s Guaranteed noise margin 1V s High noise immunity VCC typ. s High segment sourcing current 40 mA VCC − 1.6V, VCC = 5V s Internal multiplexing circuitry Design Considerations Segment resistors are desirable to minimize power dissipation and chip heating. The DS75492 serves as a good digit driver when it is desired to drive bright displays. When using this driver with a 5V supply at room temperature, the display can be driven without segment resistors to full illumination. The user must use caution in this mode however, to prevent overheating of the device by using too high a supply voltage or by operating at high ambient temperatures. The input protection circuitry consists of a series resistor, and a diode to ground. Thus input signals exceeding VCC will not be clamped. This input signal should not be allowed to exceed 15V. Ordering Code: Order Number MM74C925N MM74C926N MM74C927N MM74C928N Package Number Package Description N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide N18A 18-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide N18A 18-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide N18A 18-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 1999 Fairchild Semiconductor Corporation DS005919.prf MM74C925 • MM74C926 • MM74C927 • MM74C928 Connection Diagrams Pin Assignments for DIP Top View MM74C925 Functional Description Reset Asynchronous, active high Display Select High, displays output of counter Low, displays output of latch Latch Enable High, flow through condition Low, latch condition Clock edge sensitive Logic Diagrams Top View MM74C926, MM74C927, MM74C928 Segment Output Current sourcing with 40 mA = VCC − 1.6V typ. Also, sink capability = 2 LTTL loads Digit Output Current sourcing with 1 mA = 1.75V. Also, sink capability = 2 LTTL loads Carry-Out 2 LTTL loads. See carry-out waveforms. MM74C925 MM74C925 • MM74C926 • MM74C927 • MM74C928 Logic Diagrams Continued MM74C926 MM74C927 MM74C928 MM74C925 • MM74C926 • MM74C927 • MM74C928 Absolute Maximum Ratings Note 1 Voltage at Any Output Pin Voltage at Any Input Pin Operating Temperature Range TA Storage Temperature Range Power Dissipation PD |
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