MM74C89N

MM74C89N Datasheet

MM74C89 64-Bit 3-STATE Random Access Read/Write Memory

Part	Datasheet
MM74C89N	MM74C89N (pdf)

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MM74C89 64-Bit 3-STATE Random Access Read/Write Memory MM74C89 64-Bit 3-STATE Random Access Read/Write Memory The MM74C89 is a 16-word by 4-bit random access read/ write memory. Inputs to the memory consist of four address lines, four data input lines, a write enable line and a memory enable line. The four binary address inputs are decoded internally to select each of the 16 possible word locations. An internal address register latches the address information on the positive to negative transition of the memory enable input. The four 3-STATE data output lines working in conjunction with the memory enable input provide for easy memory expansion. Address Operation Address inputs must be stable tSA prior to the positive to negative transition of memory enable. It is thus not necessary to hold address information stable for more than tHA after the memory is enabled positive to negative transition of memory enable . Write Operation Information present at the data inputs is written into the memory at the selected address by bringing write enable and memory enable LOW. Read Operation The complement of the information which was written into the memory is non-destructively read out at the four outputs. This is accomplished by selecting the desired address and bringing memory enable LOW and write enable HIGH. When the device is writing or disabled the output assumes a 3-STATE Hi-z condition. s Wide supply voltage range 3.0V to 15V s Guaranteed noise margin 1.0V s High noise immunity VCC typ. s Low power TTL compatibility: fan out of 2 driving 74L s Low power consumption 100 nW/package typ. s Fast access time 130 ns typ. at VCC = 10V s 3-STATE output Note The timing is different than the DM7489 in that a positive to negative transition of the memory enable must occur for the memory to be selected. Ordering Code: Order Number Package Number Package Description MM74C89N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Connection Diagram Truth Table ME WE Operation Condition of Outputs L Write 3-STATE L H Read Complement of Selected Word H L Inhibit, Storage 3-STATE H Inhibit, Storage 3-STATE Top View 2002 Fairchild Semiconductor Corporation DS005888 MM74C89 Logic Diagram MM74C89 Absolute Maximum Ratings Note 1 Voltage at any Pin Operating Temperature Range Storage Temperature Range TS Power Dissipation PD Dual-In-Line Small Outline Operating VCC Range Absolute Maximum VCC Lead Temperature TL Soldering, 10 seconds −0.3V to VCC +0.3V −55°C to +125°C −65°C to +150°C 700 mW 500 mW 3.0V to 15V 260°C Note 1 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. DC Electrical Characteristics Min/Max limits apply across temperature range, unless otherwise noted Parameter Conditions CMOS TO CMOS VIN 1 Logical “1” Input Voltage VIN 0 Logical “0” Input Voltage VOUT 1 Logical “1” Output Voltage VOUT 0 Logical “0” Output Voltage IIN 1 IIN 0 IOZ

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MM74C89 64-Bit 3-STATE Random Access Read/Write Memory

MM74C89 64-Bit 3-STATE Random Access Read/Write Memory

The MM74C89 is a 16-word by 4-bit random access read/ write memory. Inputs to the memory consist of four address lines, four data input lines, a write enable line and a memory enable line. The four binary address inputs are decoded internally to select each of the 16 possible word locations. An internal address register latches the address information on the positive to negative transition of the memory enable input. The four 3-STATE data output lines working in conjunction with the memory enable input provide for easy memory expansion.

Address Operation Address inputs must be stable tSA prior to the positive to negative transition of memory enable. It is thus not necessary to hold address information stable for more than tHA after the memory is enabled positive to negative transition of memory enable .

Write Operation Information present at the data inputs is written into the memory at the selected address by bringing write enable and memory enable LOW.

Read Operation The complement of the information which was written into the memory is non-destructively read out at the four outputs. This is accomplished by selecting the desired address and bringing memory enable LOW and write enable HIGH.

When the device is writing or disabled the output assumes a 3-STATE Hi-z condition.
s Wide supply voltage range 3.0V to 15V s Guaranteed noise margin 1.0V s High noise immunity VCC typ. s Low power TTL compatibility:
fan out of 2 driving 74L s Low power consumption 100 nW/package typ. s Fast access time 130 ns typ. at VCC = 10V s 3-STATE output

Note The timing is different than the DM7489 in that a positive to negative transition of the memory enable must occur for the memory to be selected.
Ordering Code:

Order Number Package Number

Package Description

MM74C89N

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide

Connection Diagram

Truth Table

ME WE Operation

Condition of Outputs

L Write
3-STATE

L H Read

Complement of Selected Word

H L Inhibit, Storage 3-STATE

H Inhibit, Storage 3-STATE

Top View 2002 Fairchild Semiconductor Corporation DS005888

MM74C89

Logic Diagram

MM74C89

Absolute Maximum Ratings Note 1

Voltage at any Pin Operating Temperature Range Storage Temperature Range TS Power Dissipation PD

Dual-In-Line Small Outline Operating VCC Range Absolute Maximum VCC Lead Temperature TL Soldering, 10 seconds
−0.3V to VCC +0.3V −55°C to +125°C −65°C to +150°C
700 mW 500 mW 3.0V to 15V
260°C

Note 1 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.

DC Electrical Characteristics

Min/Max limits apply across temperature range, unless otherwise noted

Parameter

Conditions

CMOS TO CMOS

VIN 1

Logical “1” Input Voltage

VIN 0

Logical “0” Input Voltage

VOUT 1

Logical “1” Output Voltage

VOUT 0

Logical “0” Output Voltage

IIN 1 IIN 0 IOZ

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Datasheet ID: MM74C89N 634358