MM74C74MX

MM74C74MX Datasheet

MM74C74 Dual D-Type Flip-Flop

Part	Datasheet
MM74C74MX	MM74C74MX (pdf)

Related Parts	Information
MM74C74M	MM74C74M
MM74C74N	MM74C74N

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MM74C74 Dual D-Type Flip-Flop MM74C74 Dual D-Type Flip-Flop The MM74C74 dual D-type flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors. Each flip-flop has independent data, preset, clear and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset or clear is independent of the clock and accomplished by a low level at the preset or clear input. s Supply voltage range 3V to 15V s Tenth power TTL compatible Drive 2 LPT2L loads s High noise immunity VCC typ. s Low power 50 nW typ. s Medium speed operation 10 MHz typ. with 10V supply • Automotive • Data terminals • Instrumentation • Medical electronics • Alarm system • Industrial electronics • Remote metering • Computers Ordering Code: Order Number Package Number Package Description MM74C74M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow MM74C74N N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table Preset Clear Note 1 Note 1 No change in output from previous state. 0 1 Qn Note 1 Note A logic “0” on clear sets Q to logic A logic “0” on preset sets Q to logic Top View 2002 Fairchild Semiconductor Corporation DS005885 MM74C74 Logic Diagram MM74C74 Absolute Maximum Ratings Note 2 Voltage at Any Pin Note 2 Operating Temperature Range Storage Temperature Range Power Dissipation Dual-In-Line Small Outline Lead Temperature Soldering, 10 seconds Operating VCC Range VCC Max −0.3V to VCC +0.3V −55°C to +125°C −65°C to +150°C 700 mW 500 mW 260°C 3V to 15V Note 2 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Parameter Conditions CMOS TO CMOS VIN 1 Logical “1” Input Voltage VIN 0 Logical “0” Input Voltage VOUT 1 Logical “1” Output Voltage VOUT 0 Logical “0” Output Voltage IIN 1 Logical “1” Input Current IIN 0 Logical “0” Input Current Supply Current CMOS/LPTTL INTERFACE VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 15V VCC = 15V VCC = 15V

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MM74C74 Dual D-Type Flip-Flop

MM74C74 Dual D-Type Flip-Flop

The MM74C74 dual D-type flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors. Each flip-flop has independent data, preset, clear and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset or clear is independent of the clock and accomplished by a low level at the preset or clear input.
s Supply voltage range 3V to 15V s Tenth power TTL compatible Drive 2 LPT2L loads s High noise immunity VCC typ. s Low power 50 nW typ. s Medium speed operation 10 MHz typ. with 10V
supply
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Alarm system
• Industrial electronics
• Remote metering
• Computers
Ordering Code:

Order Number Package Number

Package Description

MM74C74M

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

MM74C74N

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Truth Table

Preset

Clear

Note 1

Note 1 No change in output from previous state.
0 1 Qn Note 1

Note A logic “0” on clear sets Q to logic A logic “0” on preset sets Q to logic

Top View
2002 Fairchild Semiconductor Corporation DS005885

MM74C74

Logic Diagram

MM74C74

Absolute Maximum Ratings Note 2

Voltage at Any Pin Note 2 Operating Temperature Range Storage Temperature Range Power Dissipation

Dual-In-Line Small Outline Lead Temperature Soldering, 10 seconds Operating VCC Range VCC Max
−0.3V to VCC +0.3V −55°C to +125°C −65°C to +150°C
700 mW 500 mW
260°C 3V to 15V

Note 2 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.

DC Electrical Characteristics

Min/Max limits apply across temperature range unless otherwise noted

Parameter

Conditions

CMOS TO CMOS

VIN 1

Logical “1” Input Voltage

VIN 0

Logical “0” Input Voltage

VOUT 1

Logical “1” Output Voltage

VOUT 0

Logical “0” Output Voltage

IIN 1

Logical “1” Input Current

IIN 0

Logical “0” Input Current

Supply Current

CMOS/LPTTL INTERFACE

VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 15V VCC = 15V VCC = 15V

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Datasheet ID: MM74C74MX 634355