FOD8012R2

FOD8012R2 Datasheet

FOD8012 High CMR, Bi-Directional, Logic Gate Optocoupler

Part	Datasheet
FOD8012R2	FOD8012R2 (pdf)

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FOD8012 High CMR, Bi-Directional, Logic Gate Optocoupler November 2010 FOD8012 High CMR, Bi-Directional, Logic Gate Optocoupler • Full Duplex, Bi-Directional • 20kV/µs Minimum Common Mode Rejection • High Speed: 15Mbit/sec Data Rate NRZ 60ns max. Propagation Delay 15ns max. Pulse Width Distortion 30ns max. Propagation Delay Skew • 3.3V and 5V CMOS Compatibility • Extended industrial temperate range, -40 to temperature range • Safety and regulatory approvals UL1577, 3750 VACRMS for 1 min. DIN EN/IEC60747-5-2 approval pending • Industrial communications DeviceNet, CAN, RS485, RS232 • Microprocessor System Interface SPI, I2C • Programmable Logic Control • Isolated Data Acquisition System • Voltage Level Translator The FOD8012 is a full duplex, bi-directional, high-speed logic gate Optocoupler, which supports isolated communications allowing digital signals to communicate between systems without conducting ground loops or hazardous voltages. It utilizes Fairchild’s proprietary coplanar packaging technology, and optiIC design to achieve minimum 20kV/µs Common Mode Noise Rejection CMR rating. This high-speed logic gate optocoupler is highly integrated with 2 optically coupled channels arranged in bi-directional configuration, and housed in a compact 8-pin small outline package. Each optocoupler channel consists of a high-speed AlGaAs LED driven by a CMOS buffer IC coupled to a CMOS detector IC. The detector IC comprises of an integrated photodiode, a high-speed trans-impedance amplifier and a voltage comparator with an output driver. The CMOS technology coupled to the high efficiency of the LED achieves low power consumption as well as very high speed 60ns propagation delay, 15ns pulse width distortion . Related Resources • FOD8001, High Noise Immunity, 3.3V/5V Logic Gate Optocoupler Datasheet Functional Schematic VDD1 1 VOA 2 8 VDD2 7 VINA VINB 3 6 VOB GND1 4 5 GND2 0.1µF bypass capacitor required from VDD to GND Truth Table High Low OFF ON High Low FOD8012 High CMR, Bi-Directional, Logic Gate Optocoupler Pin Definitions Pin Number 1 2 3 4 5 6 7 8 Pin Name VDD1 VOA VINB GND1 GND2 VOB VINA VDD2 Supply Voltage to Channel-A detector IC and Channel-B buffer IC Output Voltage from Channel-A detector IC Input Voltage to Channel-B buffer IC Ground for Channel-A detector IC and Channel-B buffer IC Ground for Channel-A buffer IC and Channel-B detector IC Output Voltage from Channel-B detector IC Input Voltage to Channel-A buffer IC Supply Voltage to Channel-A buffer IC and Channel-B detector IC Absolute Maximum Ratings TA=25ºC unless otherwise specified Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TSTG TOPR TJ TSOL VDD1, VDD2 VIA, VIB IIA, IIB VOA, VOB IOA, IOB PDI PDO Parameter Storage Temperature Operating Temperature Junction Temperature Lead Solder Temperature Refer to Temperature Supply Voltage Input Voltage Input DC Current Output Voltage Average Output Current Input Power Dissipation 1 Output Power Dissipation 1 Value -40 to +125 -40 to +110 -40 to +130 260 for 10sec 0 to VDD+0.5 -10 to +10 to VDD+0.5 Ordering Information Option No Order Entry FOD8012 FOD8012R2 Description Small outline 8-pin, shipped in tubes 50 units per tube Small outline 8-pin, tape and reel 2,500 units per reel All packages are lead free per JEDEC J-STD-020B standard. Marking Information 8012 2 X YY S1 5 1 Fairchild logo 2 Device number 3 One digit year code, e.g., ‘8’ 4 Two digit work week ranging from ‘01’ to ‘53’ 5 Assembly package code 2010 Fairchild Semiconductor Corporation FOD8012 High CMR, Bi-Directional, Logic Gate Optocoupler Temperature °C 260 245 220 TL Max. Ramp-up Rate = 3°C/S Max. Ramp-down Rate = 6°C/S Tsmax Tsmin Time 25°C to Peak Time seconds tP tL Freature Temperature Min. Tsmin Temperature Max. Tsmax Time tS from Tsmin to Tsmax Ramp-up Rate tL to tP Liquidous Temperature TL Time tL Maintained Above TL Peak Body Package Temperature Time tP within 5°C of 245°C Ramp-down Rate TP to TL Time 25°C to Peak Temperature Pb-Free Assembly 150°C 200°C seconds 3°C/second max. 217°C seconds 245°C +0°C / 30 seconds 6°C/second max. 8 minutes max. 2010 Fairchild Semiconductor Corporation TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. AccuPower BitSiC Build it Now CorePLUS CorePOWER CROSSVOLT CTL Current Transfer Logic Dual Cool EfficientMax ESBC Fairchild FACT Quiet Series FastvCore FETBench FPS F-PFS Global Power ResourceSM GreenBridge Green FPS Green FPS e-Series Gmax GTO IntelliMAX ISOPLANAR Making Small Speakers Sound Louder and Better MegaBuck MICROCOUPLER MicroFET MicroPak MicroPak2 MillerDrive MotionMax OptoHiT PowerXS Programmable Active Droop QS Quiet Series RapidConfigure Saving our world, 1mW/W/kW at a time SignalWise SmartMax SMART START Solutions for Your Success STEALTH SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET Sync-Lock * Trademarks of System General Corporation, used under license by Fairchild Semiconductor. TinyCalc TINYOPTO TinyPower TinyPWM TinyWire TranSiC TriFault Detect Ultra FRFET UniFET VCX VisualMax VoltagePlus XS DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

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FOD8012 High CMR, Bi-Directional, Logic Gate Optocoupler

November 2010

FOD8012 High CMR, Bi-Directional, Logic Gate Optocoupler
• Full Duplex, Bi-Directional
• 20kV/µs Minimum Common Mode Rejection
• High Speed:
15Mbit/sec Data Rate NRZ 60ns max. Propagation Delay 15ns max. Pulse Width Distortion 30ns max. Propagation Delay Skew
• 3.3V and 5V CMOS Compatibility
• Extended industrial temperate range, -40 to temperature range
• Safety and regulatory approvals UL1577, 3750 VACRMS for 1 min. DIN EN/IEC60747-5-2 approval pending
• Industrial communications DeviceNet, CAN, RS485, RS232
• Microprocessor System Interface SPI, I2C
• Programmable Logic Control
• Isolated Data Acquisition System
• Voltage Level Translator

The FOD8012 is a full duplex, bi-directional, high-speed logic gate Optocoupler, which supports isolated communications allowing digital signals to communicate between systems without conducting ground loops or hazardous voltages. It utilizes Fairchild’s proprietary coplanar packaging technology, and optiIC design to achieve minimum 20kV/µs Common Mode Noise Rejection CMR rating.

This high-speed logic gate optocoupler is highly integrated with 2 optically coupled channels arranged in bi-directional configuration, and housed in a compact 8-pin small outline package. Each optocoupler channel consists of a high-speed AlGaAs LED driven by a CMOS buffer IC coupled to a CMOS detector IC. The detector IC comprises of an integrated photodiode, a high-speed trans-impedance amplifier and a voltage comparator with an output driver. The CMOS technology coupled to the high efficiency of the LED achieves low power consumption as well as very high speed 60ns propagation delay, 15ns pulse width distortion .

Related Resources
• FOD8001, High Noise Immunity, 3.3V/5V Logic Gate Optocoupler Datasheet

Functional Schematic

VDD1 1 VOA 2
8 VDD2 7 VINA

VINB 3
6 VOB

GND1 4
5 GND2
0.1µF bypass capacitor required from VDD to GND

Truth Table

High Low

OFF ON

High Low

FOD8012 High CMR, Bi-Directional, Logic Gate Optocoupler

Pin Definitions

Pin Number
1 2 3 4 5 6 7 8

Pin Name

VDD1 VOA VINB GND1 GND2 VOB VINA VDD2

Supply Voltage to Channel-A detector IC and Channel-B buffer IC Output Voltage from Channel-A detector IC Input Voltage to Channel-B buffer IC Ground for Channel-A detector IC and Channel-B buffer IC Ground for Channel-A buffer IC and Channel-B detector IC Output Voltage from Channel-B detector IC Input Voltage to Channel-A buffer IC Supply Voltage to Channel-A buffer IC and Channel-B detector IC

Absolute Maximum Ratings TA=25ºC unless otherwise specified

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

TSTG TOPR

TJ TSOL

VDD1, VDD2 VIA, VIB IIA, IIB VOA, VOB IOA, IOB PDI PDO

Parameter

Storage Temperature Operating Temperature Junction Temperature Lead Solder Temperature Refer to Temperature Supply Voltage Input Voltage Input DC Current Output Voltage Average Output Current Input Power Dissipation 1 Output Power Dissipation 1

Value -40 to +125 -40 to +110 -40 to +130 260 for 10sec
0 to VDD+0.5
-10 to +10 to VDD+0.5
Ordering Information

Option No

Order Entry FOD8012

FOD8012R2

Description Small outline 8-pin, shipped in tubes 50 units per tube Small outline 8-pin, tape and reel 2,500 units per reel

All packages are lead free per JEDEC J-STD-020B standard.

Marking Information
8012 2 X YY S1 5
1 Fairchild logo 2 Device number 3 One digit year code, e.g., ‘8’ 4 Two digit work week ranging from ‘01’ to ‘53’ 5 Assembly package code
2010 Fairchild Semiconductor Corporation

FOD8012 High CMR, Bi-Directional, Logic Gate Optocoupler

Temperature °C
260 245
220 TL

Max. Ramp-up Rate = 3°C/S Max. Ramp-down Rate = 6°C/S

Tsmax

Tsmin

Time 25°C to Peak

Time seconds
tP tL

Freature Temperature Min. Tsmin Temperature Max. Tsmax Time tS from Tsmin to Tsmax Ramp-up Rate tL to tP Liquidous Temperature TL Time tL Maintained Above TL Peak Body Package Temperature Time tP within 5°C of 245°C Ramp-down Rate TP to TL Time 25°C to Peak Temperature

Pb-Free Assembly 150°C 200°C
seconds 3°C/second max.
217°C seconds 245°C +0°C /
30 seconds 6°C/second max. 8 minutes max.
2010 Fairchild Semiconductor Corporation

TRADEMARKS

The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.

AccuPower BitSiC Build it Now CorePLUS CorePOWER CROSSVOLT CTL Current Transfer Logic Dual Cool EfficientMax ESBC

Fairchild FACT Quiet Series FastvCore FETBench FPS

F-PFS Global Power ResourceSM GreenBridge Green FPS Green FPS e-Series Gmax GTO IntelliMAX ISOPLANAR Making Small Speakers Sound Louder
and Better MegaBuck MICROCOUPLER MicroFET MicroPak MicroPak2 MillerDrive MotionMax OptoHiT

PowerXS Programmable Active Droop QS Quiet Series RapidConfigure

Saving our world, 1mW/W/kW at a time SignalWise SmartMax SMART START Solutions for Your Success STEALTH SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET Sync-Lock
* Trademarks of System General Corporation, used under license by Fairchild Semiconductor.

TinyCalc TINYOPTO TinyPower TinyPWM TinyWire TranSiC TriFault Detect

Ultra FRFET UniFET VCX VisualMax VoltagePlus XS

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived FOD8012R2 Datasheet file may be downloaded here without warranties.

Datasheet ID: FOD8012R2 514963