FIN224ACGFX

FIN224ACGFX Datasheet


FIN224AC 22-Bit Bi-Directional Serializer/Deserializer

Part Datasheet
FIN224ACGFX FIN224ACGFX FIN224ACGFX (pdf)
Related Parts Information
FIN224ACMLX FIN224ACMLX FIN224ACMLX
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FIN224AC 22-Bit Bi-Directional Serializer/Deserializer

Click here for this datasheet translated into Korean!

April 2011

FIN224AC 22-Bit Bi-Directional Serializer/Deserializer
• Industry smallest 22-bit Serializer/Deserializer pair
• Low power for minimum impact on battery life Multiple power-down modes
• 100nA in standby mode, 5mA typical operating conditions
• Highly rolled LVCMOS edge rate option to meet regulatory requirements
• Cable reduction 25:4 or greater
• Differential signaling EMI when using CTL in lab conditions shielding EMI filter susceptibility to external interference
• Up to 22 bits in either direction
• Voltage translation from 1.65V to 3.6V
• High ESD protection > 15kV HBM
• Parallel I/O power supply VDDP range, 1.65V - 3.6V
• Can support Microcontroller or RGB pixel interface
• Image sensors
• Small displays LCD, cell phone, digital camera, portable gaming, printer, PDA, video camera, automotive

The FIN224AC µSerDes is a low-power serializer/ deserializer SerDes that can help minimize the cost and power of transferring wide signal paths. Through the use of serialization, the number of signals transferred from one point to another can be significantly reduced. Typical reduction is 4:1 to 6:1 for unidirectional paths. For bidirectional operation, using half duplex for multiple sources, it is possible to reach signal reduction close to Through the use of differential signaling, shielding and EMI filters can also be minimized, further reducing the cost of serialization. The differential signaling is also important for providing a noise-insensitive signal that can withstand radio and electrical noise sources. Major reduction in power consumption allows minimal impact on battery life in ultra-portable applications. It is possible to use a single PLL for most applications including bidirectional operation.

FIN224AC to FIN24AC Comparison
• Up to 20% power reduction
• Double wide CKP pulse on FIN224AC, Mode 3
• Rolled edge rate for deserializer outputs on FIN224AC, for single display applications
• Same voltage range
• Same pinout and package
Ordering Information

Order Number

Operating Temperature

Range

FIN224ACGFX
-30 to +70°C

FIN224ACMLX
-30 to +70°C

Package Description

Packing Method
42-Ball, Ultra-Small Scale Ball Grid Array USS-BGA , JEDEC MO-195, 3.5mm Wide Slow LVCMOS Edge Rate

Tape and Reel
40-Terminal, Molded Leadless Package MLP , Quad, JEDEC MO-220, 6mm Square Slow LVCMOS Edge Rate

Tape and Reel
µSerDesTM is a trademark of Fairchild Semiconductor Corporation.

FIN224AC 22-Bit Bi-Directional Serializer/Deserializer

Register

Basic Concept

LVCMOS 22

FIN224AC Serializer

FIN224AC Deserializer

Figure Conceptual Diagram

LVCMOS 22

Functional Block Diagram

CKREF STROBE DP[21:22] DP[1:20]

DP[23:24]

S1 S2 DIRI

Register
cksint

Serializer Control

Serializer + -

Deserializer

Deserializer Control
cksint

CKS0+ CKS0-

DSO+/DSIDSO-/DSI+
100 Gated Termination

CKSI+ CKSI-

WORD CK Generator

Control Logic

Freq Direction
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Datasheet ID: FIN224ACGFX 514682