FAN5068MPX

FAN5068MPX Datasheet

FAN5068

Part	Datasheet
FAN5068MPX	FAN5068MPX (pdf)

PDF Datasheet Preview
FAN5068 DDR-1/DDR-2 plus ACPI Regulator Combo • PWM regulator for VDDQ 2.5V or 1.8V • Linear LDO regulator generates VTT = VDDQ/2, 1.5A Peak sink/source capability • 1 independent programable ULDO controllers driving external N-Channel MOSFET • ACPI drive and control for 5V DUAL generation • 3.3V Internal LDO for 3V-ALW generation • 300kHz frequency switching • RDS ON current sensing or optional current sense resistor for precision over-current detect • Internal Synchronous Boot diode • Power Good signal for all voltages • Input Under-Voltage Lock-Out UVLO • Thermal Shutdown • Latched Multi-Fault Protection • 24-pin 5x5mm MLP package • DDR-1/DDR-2 VDDQ and VTT voltage generation with ACPI support • Desktop PC's • Servers The FAN5068 DDR memory regulator combines a PWM controller to generate the supply voltage, VDDQ, and a linear regulator to generate VTT, the termination voltage. Synchronous provides over a wide range of load currents. is further enhanced by using the low-side MOSFET’s RDS ON to sense current instead of a series sense resistor. In S3 mode, only the VDDQ switcher and the 3.3V regulators remain on while the VTT and ULDO regulators are shut off. To avoid "glitching" the VDDQ output during the transition from S3 to S0, the three linear regulators use the SS capacitor to limit their slew rates, thereby limiting the surge current from the VDDQ output. PGOOD becomes true in S0 only when all 3 regulators have achieved stable outputs. In S5 EN = 0 , the 3.3V internal LDO stays on, while the other regulators are powered down. The VDDQ PWM regulator is a sampled current mode control with external compensation to achieve fast load transient response and provide system design optimization. The VTT regulator derives its reference and takes its power from the VDDQ PWM regulator output using a precision internal voltage divider to set its output at 1/2 of VDDQ. The VTT termination regulator is capable of sourcing or sinking at least 1.5A peak current. PRODUCT SPECIFICATION FAN5068 Block Diagrams 5V DUAL +5VSB Q4 C13 SBSW +5VSB C4 C3 S3#O VCC EN S3#I ILIM PGOOD MAIN ALW VDDQ C12 G1.2 OUT R7 FB1.2 +12 R4 SYS LDOs VTT LDO Q3 +5MAIN 5V MAIN BOOT L2 C5 Q1 HDRV SW ISNS R3 L1 VDDQ COUT LDRV C9 COMP R1 C6 Ordering Information Part Number FAN5068MPX Temperature Range -10°C to 85°C Package MLP-24 5x5 mm FAN5068 Packing Tape and Reel DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices or systems which, a are intended for surgical implant into the body, or b support or sustain life, and c whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 9/9/04 0.0m 004 Stock#DS30005068 2004 Fairchild Semiconductor Corporation

PDF Datasheet Preview

FAN5068

DDR-1/DDR-2 plus ACPI Regulator Combo
• PWM regulator for VDDQ 2.5V or 1.8V
• Linear LDO regulator generates VTT = VDDQ/2, 1.5A

Peak sink/source capability
• 1 independent programable ULDO controllers driving
external N-Channel MOSFET
• ACPI drive and control for 5V DUAL generation
• 3.3V Internal LDO for 3V-ALW generation
• 300kHz frequency switching
• RDS ON current sensing or optional current sense resistor
for precision over-current detect
• Internal Synchronous Boot diode
• Power Good signal for all voltages
• Input Under-Voltage Lock-Out UVLO
• Thermal Shutdown
• Latched Multi-Fault Protection
• 24-pin 5x5mm MLP package
• DDR-1/DDR-2 VDDQ and VTT voltage generation with ACPI support
• Desktop PC's
• Servers

The FAN5068 DDR memory regulator combines a PWM controller to generate the supply voltage, VDDQ, and a linear regulator to generate VTT, the termination voltage. Synchronous provides over a wide range of load currents. is further enhanced by using the low-side MOSFET’s RDS ON to sense current instead of a series sense resistor.

In S3 mode, only the VDDQ switcher and the 3.3V regulators remain on while the VTT and ULDO regulators are shut off. To avoid "glitching" the VDDQ output during the transition from S3 to S0, the three linear regulators use the SS capacitor to limit their slew rates, thereby limiting the surge current from the VDDQ output. PGOOD becomes true in S0 only when all 3 regulators have achieved stable outputs.

In S5 EN = 0 , the 3.3V internal LDO stays on, while the other regulators are powered down.

The VDDQ PWM regulator is a sampled current mode control with external compensation to achieve fast load transient response and provide system design optimization.

The VTT regulator derives its reference and takes its power from the VDDQ PWM regulator output using a precision internal voltage divider to set its output at 1/2 of VDDQ. The VTT termination regulator is capable of sourcing or sinking at least 1.5A peak current.

PRODUCT SPECIFICATION

FAN5068

Block Diagrams
5V DUAL
+5VSB

Q4 C13

SBSW
+5VSB C4 C3

S3#O VCC

EN S3#I

ILIM

PGOOD

MAIN

ALW VDDQ C12

G1.2

OUT R7 FB1.2
+12 R4

SYS LDOs

VTT LDO

Q3 +5MAIN
5V MAIN BOOT

L2 C5

Q1 HDRV SW ISNS R3

L1 VDDQ

COUT

LDRV

C9 COMP

R1 C6
Ordering Information

Part Number FAN5068MPX

Temperature Range -10°C to 85°C

Package MLP-24 5x5 mm

FAN5068

Packing Tape and Reel

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

Life support devices or systems are devices or systems which, a are intended for surgical implant into the body, or b support or sustain life, and c whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
9/9/04 0.0m 004 Stock#DS30005068 2004 Fairchild Semiconductor Corporation

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Datasheet ID: FAN5068MPX 513910