AS1372-WL-12_EK_ST

AS1372-WL-12_EK_ST Datasheet

AS1372

Part	Datasheet
AS1372-WL-12_EK_ST	AS1372-WL-12_EK_ST (pdf)

Related Parts	Information
AS1372-BWLT-12	AS1372-BWLT-12
AS1372-BWLT-10	AS1372-BWLT-10
AS1372-BWLT-15	AS1372-BWLT-15
AS1372-BWLT-13	AS1372-BWLT-13
AS1372-WL-15_EK_ST	AS1372-WL-15_EK_ST
AS1372-WL-13_EK_ST	AS1372-WL-13_EK_ST

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Datasheet AS1372 350mA Dual Rail Linear Regulator 1 General Description The AS1372 is a Dual Supply Rail Linear Regulator designed for providing ultra-low voltages. In a typical application the battery is directly connected to VBIAS and VIN is connected to the output of a DC-DC Converter. The very low quiescent currents together with the excellent transient features and the superior dropout are making the AS1372 an ideal device for applications running on batteries. The robust design ensures that no under-voltage failure can occur and the device is also equipped with an internal protection against over-temperature and overcurrent. The device is available in fixed output voltages from 0.5V up to 2.2V in 100mV steps 50mV from 0.5V to 1.1V . The AS1372 is available in a 5-bumps CS-WLP package and is qualified for -40°C to +85°C operation. 2 Key Features ! Input Voltage 0.7V to 4.5V ! Bias Supply Voltage 2.5V to 5.5V ! Output Voltage 0.5V to 2.2V in 100mV steps ! Output Voltage Accuracy ! Dropout Voltage 135mV 350mA load ! Max. Output Current 350mA ! Load Transient Response ±15mV typ. ! Superior Efficiency ! Low Shutdown Current 10nA ! High PSRR >80dB 10Hz-1kHz, 60db ! Noise Voltage 50µVRMS from 10Hz to 1000kHz ! Integrated Overtemperature/Overcurrent Protection ! Chip Enable Input ! Operating Temperature Range -40°C to +85°C ! 5-bumps CS-WLP Package 3 Applications The devices are ideal for powering cordless and mobile phones, MP3 players, PDAs, hand-held computers, digital cameras, and any other hand-held and/or batterypowered device. Figure AS1372 - Typical Application Diagram 1 - 14 AS1372 Datasheet - Pin Assignments 4 Pin Assignments Figure Pin Assignments Top View Pin Descriptions Table Pin Descriptions Pin Number 1 2 Pin Name VOUT GND VBIAS Description Regulated Output Voltage. Bypass this pin with a capacitor to GND. Ground. Enable. Pull this pin to low to disable the device. This pin has an internal 1.6MΩ typ. pull-down resistor. Bias Supply Voltage. 2.5V to 5.5V, Bypass this pin with a capacitor to GND. Unregulated Input Voltage. 0.7V to 4.5V, VIN VBIAS, Bypass this pin with a capacitor to GND. 2 - 14 AS1372 Datasheet - Absolute Maximum Ratings 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table Absolute Maximum Ratings Parameter Units Notes VIN, VBIAS and EN to GND VIN < VBIAS or equal in operating conditions VOUT to GND VIN + Output Short-Circuit Duration see Ordering Information on page 13 VOUT NOM - VOUT Output Voltage Accuracy VOUT > 1.2V Output Voltage Accuracy VOUT 1.2V IOUT = 100µA IOUT = 100µA to 350mA, VIN = VOUT NOM +0.2V to 4.5V, VBIAS = VOUT NOM +1.5V to 5.5V IOUT = 100µA IOUT = 100µA to 350mA, VIN = VOUT NOM +0.2V to 4.5V, VBIAS = VOUT NOM +1.5V to 5.5V Line Regulation VIN Line Regulation VBIAS VIN = VOUT NOM +0.2V to 4.5V, VBIAS = 5.5V, IOUT = 100µA VBIAS = VOUT NOM +1.5V to 5.5V, IOUT = 100µA µV/V µV/V Load Regulation IOUT = 1mA to 350mA µV/mA IOUT Output Current1 ILIM Current Limit VDROP - VBIAS = VOUT + 1.5V, IOUT = 350mA Output Voltage Dropout VIN VBIAS = VOUT + 1.8V, IOUT = 350mA VBIAS = 5.5V, IOUT = 350mA VDROP VBIAS Output Voltage Dropout VBIAS IOUT = 100mA Output Voltage Noise VOUT 1.2V, f = 10Hz to 100kHz µVRMS PSRR - Power-Supply Rejection Ratio Sine modulated VIN PSRR VBIAS Power-Supply Rejection Ratio Sine modulated VBIAS IQ_VBIAS IQ_VIN Quiescent Current into VBIAS Quiescent Current into VIN f = 100Hz f = 1kHz f = 10kHz f = 100kHz f = 100Hz f = 1kHz f = 10kHz f = 100kHz The AS1372 is a low-dropout, low-quiescent-current linear regulator intended for LDO regulator applications where output current load requirements range from no load to 350mA. All devices come with fixed output voltage from 0.5V to 2.2V. see Ordering Information on page Shutdown current for the whole regulator is typically 10nA. The device features integrated short-circuit and over current protection. Under-Voltage lockout prevents erratic operation when the input voltage is slowly decaying e.g. in a battery powered application . Thermal Protection shuts down the device when die temperature reaches 150°C. This is a useful protection when the device is under sustained short circuit conditions. As illustrated in Figure 19, the devices comprise voltage reference, error amplifier, N-channel MOSFET pass transistor, internal voltage divider, current limiter, thermal sensor and shutdown logic. The bandgap reference is connected to the inverting input of the error amplifier. The error amplifier compares this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the N-channel MOSFET gate is pulled higher, allowing more current to pass to the output, and increases the output voltage. If the feedback voltage is too high, the pass-transistor gate is pulled down, allowing less current to pass to the output. The output voltage feeds back through an internal resistor voltage divider connected to pin OUT. Figure AS1372 - Block Diagram VIN VBIAS Thermal Overload Protection Bandgap Voltage & Current Reference Shutdown/ Power-On Control Logic Trimmable Reference Voltage Error Amplifier NMOS AS1372 Output Voltages Standard products are factory-set with output voltages from 0.5V to 2.2V. A two-digit suffix of the part number identifies the nominal output see Ordering Information on page Non-standard devices are available. For more information contact: 9 - 14 AS1372 Datasheet - Application Information 9 Application Information Advantages of dual supply architecture vs. traditional single supply approach. If compared to the traditional single supply approach, the dual rail architecture ensures improved performances in a LDO at the expense of an additional supply voltage and a dedicated pin. Anyhow, it is worth to note that the additional supply voltage comes for free in all those applications where the LDO is supplied by the output of a DCDC step-down converter Vin pin is coupled to the step-down output and Vbias is shorted to the DCDC converter supply. Figure Single vs. Dual Supply Single Supply VIN Dual Supply VBIAS Bandgap core blocks + error amplifier PMOS VOUT Bandgap core blocks error amplifier NMOS VOUT The former is based on a PMOS output transistor connected in a common source configuration the supply voltage at its source is shared with all the circuit. On the other side, the dual supply approach is based on a NMOS transistor in common drain configuration having its source coincident with the regulated output of the LDO the supply voltage at the drain is not shared with the remaining blocks of the circuit and its value can be chosen independently. The second solution allows improved efficiency and dropout at low output reference voltage and faster transient time response. Improved efficiency At heavy current load the power consumption is almost entirely located in the output transistor. This means that keeping drain to source voltage, that is the difference between input and output voltage of the LDO, as small as possible is the key factor for a good efficiency. It holds, approximately Efficiency = Vout / Vin x100 [%] While this achievement is little challenging in case the output voltage is large enough, traditional implementations based on a PMOS device face a serious bottleneck at low output voltage. In fact the supply voltage cannot be made consequently small because of dynamic range limitations in the core of the LDO circuitry. In many commercial cases the supply voltage cannot be made smaller than 2 or 2,5V which gives only 25% or 20% efficiency for a 500mV reference output. On the contrary, the possibility to have a dedicated supply voltage for the output transistor offers the possibility to set the drain to source voltage of the output transistor independently from the dynamic range limitations inside the core of the circuit. Thus, even at very small output voltage, the drain to source voltage can be made quite small and guarantee optimal efficiency performance. For instance, by setting Vin at 800mV makes more than 60% efficiency for an output voltage as small as 500mV still ensuring excellent analog performances in the LDO. 10 - 14 AS1372 Datasheet - Application Information Improved dropout mainly refers to the resistivity of the output transistor when its gate is driven to ground and the feedback regulation loop is open. Moreover when the output transistor is in dropout input and output voltages are nearly coincident. In this way, in a traditional approach, the gate to source voltage that determines the resistivity of the output PMOS in dropout is nearly equal to the output voltage. This means that a smaller output voltage brings worse dropout performances. In the dual supply approach, on the contrary, in dropout conditions the gate of the output transistor is pushed to Vbias voltage and only Vin drops nearly coincident to Vout. As Vbias can be chosen independently from Vin, even at small output voltages a large overdrive at the output transistor can be ensured and an extremely reduced dropout value comes out. Faster response In a traditional approach, the output of the LDO is coincident with the drain of the output PMOS transistor. In this way, if the load current suddenly changes, any variation at the output voltage is not able to vary the output current of the LDO until it is amplified to the gate of the output PMOS by the error amplifier. A delay comes, unavoidably. On the contrary, in the dual supply approach it is the source of the output transistor to be coincident with the output voltage. In this way a change in the output voltage immediately modulates the current from the LDO and a better regulation in fast load transient is achieved. 11 - 14 AS1372 Datasheet - Package Drawings and Markings 10 Package Drawings and Markings The device is available in a 5-bumps CS-WLP package. Figure 5-bumps CS-WLP Package 12 - 14 AS1372 Datasheet - Ordering Information 11 Ordering Information The device is available as the standard products listed in Table Table Ordering Information Ordering Code AS1372-BWLT-07 AS1372-BWLT-10 AS1372-BWLT-12 AS1372-BWLT-13 AS1372-BWLT-14 AS1372-BWLT-15 AS1372-BWLT-16 AS1372-BWLT-18 AS1372-BWLT-20 AS1372-BWLT-24 AS1372-BWLT-28 AS1372-BWLT-30 AS1372-BWLT-33 Marking * ASSN ASSQ ASSO * ASSR * ASSS * * * * * Output 0.7V 1.0V 1.2V 1.3V 1.4V 1.5V 1.6V 1.8V 2.0V 2.4V 2.8V 3.0V 3.3V Description 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator Delivery Form Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Package 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP * on request Non-standard devices from 0.5V to 1.1V are available in 50mV steps and from 1.1V to 2.2V in 100mV steps. For more information and inquiries contact Note All products are RoHS compliant and Pb-free. Buy our products or get free samples online at ICdirect: For further information and requests, please contact us or find your local distributor at 13 - 14 AS1372 Datasheet Copyrights Copyright 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG Tobelbaderstrasse 30 A-8141 Unterpremstaetten, Austria Tel +43 0 3136 500 0 Fax +43 0 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: 14 - 14

PDF Datasheet Preview

Datasheet

AS1372
350mA Dual Rail Linear Regulator
1 General Description

The AS1372 is a Dual Supply Rail Linear Regulator designed for providing ultra-low voltages.

In a typical application the battery is directly connected to VBIAS and VIN is connected to the output of a DC-DC Converter.

The very low quiescent currents together with the excellent transient features and the superior dropout are making the AS1372 an ideal device for applications running on batteries.

The robust design ensures that no under-voltage failure can occur and the device is also equipped with an internal protection against over-temperature and overcurrent.

The device is available in fixed output voltages from 0.5V up to 2.2V in 100mV steps 50mV from 0.5V to 1.1V .

The AS1372 is available in a 5-bumps CS-WLP package and is qualified for -40°C to +85°C operation.
2 Key Features
! Input Voltage 0.7V to 4.5V ! Bias Supply Voltage 2.5V to 5.5V ! Output Voltage 0.5V to 2.2V in 100mV steps ! Output Voltage Accuracy ! Dropout Voltage 135mV 350mA load ! Max. Output Current 350mA ! Load Transient Response ±15mV typ. ! Superior Efficiency ! Low Shutdown Current 10nA ! High PSRR >80dB 10Hz-1kHz, 60db ! Noise Voltage 50µVRMS from 10Hz to 1000kHz ! Integrated Overtemperature/Overcurrent Protection ! Chip Enable Input ! Operating Temperature Range -40°C to +85°C ! 5-bumps CS-WLP Package
3 Applications

The devices are ideal for powering cordless and mobile phones, MP3 players, PDAs, hand-held computers, digital cameras, and any other hand-held and/or batterypowered device.

Figure AS1372 - Typical Application Diagram
1 - 14

AS1372

Datasheet - Pin Assignments
4 Pin Assignments

Figure Pin Assignments Top View

Pin Descriptions

Table Pin Descriptions

Pin Number 1 2

Pin Name VOUT GND

VBIAS

Description Regulated Output Voltage. Bypass this pin with a capacitor to GND.

Ground. Enable. Pull this pin to low to disable the device. This pin has an internal 1.6MΩ typ. pull-down resistor. Bias Supply Voltage. 2.5V to 5.5V, Bypass this pin with a capacitor to GND. Unregulated Input Voltage. 0.7V to 4.5V, VIN VBIAS, Bypass this pin with a capacitor to GND.
2 - 14

AS1372

Datasheet - Absolute Maximum Ratings
5 Absolute Maximum Ratings

Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Table Absolute Maximum Ratings

Parameter

Units

Notes

VIN, VBIAS and EN to GND

VIN < VBIAS or equal in operating conditions

VOUT to GND

VIN +

Output Short-Circuit Duration
see Ordering Information on page 13

VOUT NOM - VOUT

Output Voltage Accuracy VOUT > 1.2V

Output Voltage Accuracy VOUT 1.2V

IOUT = 100µA

IOUT = 100µA to 350mA, VIN =

VOUT NOM +0.2V to 4.5V, VBIAS =

VOUT NOM +1.5V to 5.5V

IOUT = 100µA

IOUT = 100µA to 350mA, VIN =

VOUT NOM +0.2V to 4.5V, VBIAS =

VOUT NOM +1.5V to 5.5V

Line Regulation VIN Line Regulation VBIAS

VIN = VOUT NOM +0.2V to 4.5V, VBIAS = 5.5V, IOUT = 100µA

VBIAS = VOUT NOM +1.5V to 5.5V, IOUT = 100µA
µV/V
µV/V

Load Regulation

IOUT = 1mA to 350mA
µV/mA

IOUT

Output Current1

ILIM

Current Limit

VDROP -

VBIAS = VOUT + 1.5V, IOUT = 350mA

Output Voltage Dropout VIN VBIAS = VOUT + 1.8V, IOUT = 350mA

VBIAS = 5.5V, IOUT = 350mA

VDROP VBIAS

Output Voltage Dropout VBIAS

IOUT = 100mA

Output Voltage Noise

VOUT 1.2V, f = 10Hz to 100kHz
µVRMS

PSRR - Power-Supply Rejection Ratio

Sine modulated VIN

PSRR VBIAS

Power-Supply Rejection Ratio Sine modulated VBIAS

IQ_VBIAS IQ_VIN

Quiescent Current into VBIAS Quiescent Current into VIN
f = 100Hz f = 1kHz f = 10kHz f = 100kHz f = 100Hz f = 1kHz f = 10kHz f = 100kHz
The AS1372 is a low-dropout, low-quiescent-current linear regulator intended for LDO regulator applications where output current load requirements range from no load to 350mA. All devices come with fixed output voltage from 0.5V to 2.2V. see Ordering Information on page

Shutdown current for the whole regulator is typically 10nA. The device features integrated short-circuit and over current protection. Under-Voltage lockout prevents erratic operation when the input voltage is slowly decaying e.g. in a battery powered application . Thermal Protection shuts down the device when die temperature reaches 150°C. This is a useful protection when the device is under sustained short circuit conditions.

As illustrated in Figure 19, the devices comprise voltage reference, error amplifier, N-channel MOSFET pass transistor, internal voltage divider, current limiter, thermal sensor and shutdown logic.

The bandgap reference is connected to the inverting input of the error amplifier. The error amplifier compares this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the N-channel MOSFET gate is pulled higher, allowing more current to pass to the output, and increases the output voltage. If the feedback voltage is too high, the pass-transistor gate is pulled down, allowing less current to pass to the output. The output voltage feeds back through an internal resistor voltage divider connected to pin OUT.

Figure AS1372 - Block Diagram

VIN VBIAS

Thermal Overload Protection

Bandgap Voltage &

Current Reference

Shutdown/ Power-On Control Logic

Trimmable Reference

Voltage

Error

Amplifier

NMOS

AS1372

Output Voltages
Standard products are factory-set with output voltages from 0.5V to 2.2V. A two-digit suffix of the part number identifies the nominal output see Ordering Information on page Non-standard devices are available.

For more information contact:
9 - 14

AS1372

Datasheet - Application Information
9 Application Information

Advantages of dual supply architecture vs. traditional single supply approach. If compared to the traditional single supply approach, the dual rail architecture ensures improved performances in a LDO at the expense of an additional supply voltage and a dedicated pin. Anyhow, it is worth to note that the additional supply voltage comes for free in all those applications where the LDO is supplied by the output of a DCDC step-down converter Vin pin is coupled to the step-down output and Vbias is shorted to the DCDC converter supply.

Figure Single vs. Dual Supply

Single Supply VIN

Dual Supply

VBIAS

Bandgap
core blocks
+ error amplifier

PMOS VOUT

Bandgap
core blocks
error amplifier

NMOS VOUT

The former is based on a PMOS output transistor connected in a common source configuration the supply voltage at its source is shared with all the circuit. On the other side, the dual supply approach is based on a NMOS transistor in common drain configuration having its source coincident with the regulated output of the LDO the supply voltage at the drain is not shared with the remaining blocks of the circuit and its value can be chosen independently.

The second solution allows improved efficiency and dropout at low output reference voltage and faster transient time response.

Improved efficiency At heavy current load the power consumption is almost entirely located in the output transistor. This means that keeping drain to source voltage, that is the difference between input and output voltage of the LDO, as small as possible is the key factor for a good efficiency. It holds, approximately Efficiency = Vout / Vin x100 [%]

While this achievement is little challenging in case the output voltage is large enough, traditional implementations based on a PMOS device face a serious bottleneck at low output voltage. In fact the supply voltage cannot be made consequently small because of dynamic range limitations in the core of the LDO circuitry. In many commercial cases the supply voltage cannot be made smaller than 2 or 2,5V which gives only 25% or 20% efficiency for a 500mV reference output.

On the contrary, the possibility to have a dedicated supply voltage for the output transistor offers the possibility to set the drain to source voltage of the output transistor independently from the dynamic range limitations inside the core of the circuit. Thus, even at very small output voltage, the drain to source voltage can be made quite small and guarantee optimal efficiency performance. For instance, by setting Vin at 800mV makes more than 60% efficiency for an output voltage as small as 500mV still ensuring excellent analog performances in the LDO.
10 - 14

AS1372

Datasheet - Application Information

Improved dropout mainly refers to the resistivity of the output transistor when its gate is driven to ground and the feedback regulation loop is open. Moreover when the output transistor is in dropout input and output voltages are nearly coincident. In this way, in a traditional approach, the gate to source voltage that determines the resistivity of the output PMOS in dropout is nearly equal to the output voltage. This means that a smaller output voltage brings worse dropout performances. In the dual supply approach, on the contrary, in dropout conditions the gate of the output transistor is pushed to Vbias voltage and only Vin drops nearly coincident to Vout. As Vbias can be chosen independently from Vin, even at small output voltages a large overdrive at the output transistor can be ensured and an extremely reduced dropout value comes out.

Faster response In a traditional approach, the output of the LDO is coincident with the drain of the output PMOS transistor. In this way, if the load current suddenly changes, any variation at the output voltage is not able to vary the output current of the LDO until it is amplified to the gate of the output PMOS by the error amplifier. A delay comes, unavoidably. On the contrary, in the dual supply approach it is the source of the output transistor to be coincident with the output voltage. In this way a change in the output voltage immediately modulates the current from the LDO and a better regulation in fast load transient is achieved.
11 - 14

AS1372

Datasheet - Package Drawings and Markings
10 Package Drawings and Markings

The device is available in a 5-bumps CS-WLP package.

Figure 5-bumps CS-WLP Package
12 - 14

AS1372
Datasheet - Ordering Information
11 Ordering Information

The device is available as the standard products listed in Table
Table Ordering Information
Ordering Code AS1372-BWLT-07 AS1372-BWLT-10 AS1372-BWLT-12 AS1372-BWLT-13 AS1372-BWLT-14 AS1372-BWLT-15 AS1372-BWLT-16 AS1372-BWLT-18 AS1372-BWLT-20 AS1372-BWLT-24 AS1372-BWLT-28 AS1372-BWLT-30 AS1372-BWLT-33

Marking *

ASSN ASSQ ASSO
* ASSR
* ASSS
* * * * *

Output 0.7V 1.0V 1.2V 1.3V 1.4V 1.5V 1.6V 1.8V 2.0V 2.4V 2.8V 3.0V 3.3V

Description 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator 350mA Dual Rail Linear Regulator

Delivery Form Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel Tape and Reel

Package 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP 5-bumps CS-WLP
* on request

Non-standard devices from 0.5V to 1.1V are available in 50mV steps and from 1.1V to 2.2V in 100mV steps. For more information and inquiries contact

Note All products are RoHS compliant and Pb-free. Buy our products or get free samples online at ICdirect:

For further information and requests, please contact us or find your local distributor at
13 - 14

AS1372

Datasheet

Copyrights

Copyright 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies.

Disclaimer

Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services.

Contact Information

Headquarters austriamicrosystems AG Tobelbaderstrasse 30 A-8141 Unterpremstaetten, Austria Tel +43 0 3136 500 0 Fax +43 0 3136 525 01

For Sales Offices, Distributors and Representatives, please visit:
14 - 14

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AS1372-WL-12_EK_ST Datasheet file may be downloaded here without warranties.

Datasheet ID: AS1372-WL-12_EK_ST 519626