FAN1655MTFX

FAN1655MTFX Datasheet

FAN1655 3A DDR Bus Termination Regulator

Part	Datasheet
FAN1655MTFX	FAN1655MTFX (pdf)

Related Parts	Information
FAN1655M	FAN1655M
FAN1655MPX	FAN1655MPX
FAN1655MX	FAN1655MX

PDF Datasheet Preview
FAN1655 3A DDR Bus Termination Regulator January 2006 FAN1655 3A DDR Bus Termination Regulator The FAN1655 is a low-cost bi-directional LDO designed for terminating DDR memory bus. It can both sink and source up to 2.1A continuous, 3A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = VREFOUT ± 40mV. The FAN1655 includes a buffered reference voltage capable of supplying up to 5mA current. On-chip thermal limiting provides protection against a combination of power overload and ambient temperature that would create an excessive junction temperature. A shutdown input puts the FAN1655 into a low power mode. The FAN1655 regulator is available in a power-enhanced eTSSOP -16, standard SOIC-14, and an 8-Lead MLP package. • Sinks and sources 2.1A continuous, 3A peak • 0 to +125°C operating temperature range • 5mA Buffered VREFOUT = VDDQ/2 • Load regulation VTT = VREFOUT ± 40mV • On-chip thermal limiting • Low Cost SO-14, Power-Enhanced eTSSOP or 8-pin 5x6mm MLP packages • Low-Current Shutdown Mode • Output Short Circuit Protection • DDR Terminator VTT supply Ordering Information Temperature Range FAN1655M FAN1655MX 0°C to 125°C 0°C to 125°C FAN1655MTF FAN1655MTFX FAN1655MPX 0°C to 125°C 0°C to 125°C 0°C to 125°C Block Diagram Package SOIC-14 SOIC-14 eTSSOP-16 eTSSOP-16 MLP-8 VDDQ VDD SHDN VREFOUT VREFIN 200k + + 200k FAN1655 VSSQ Packing Rails Tape and Reel Rails Tape and Reel Tape and Reel VTTFORCE VTTSENSE 2006 Fairchild Semiconductor Corporation FAN1655 3A DDR Bus Termination Regulator Pin Assignments VDD 1 VDD 2 VTTFORCE 3 VSS 4 VSS 5 VTTFORCE 6 VDD 7 VSS 8 16 NC 15 VDDQ 14 VREFOUT FAN1655 13 VSSQ 12 SHDN 11 VREFIN 10 VTTSENSE 16-Lead Plastic eTSSOP-16 = *Thermal impedance is measured with the power pad soldered to a square inch copper area. The copper area should be connected to Vss ground and positioned over an internal power or ground plane to assist in heat dissipation. VDD 1 VDD 2 VTTFORCE 3 VSS 4 VSS 5 VTTFORCE 6 VDD 7 14 VDDQ 13 VREFOUT 12 VSSQ FAN1655M 11 SHDN 10 VREFIN 9 VTTSENSE 8 VSS 14-Lead Plastic SOIC = = VDD 1 VTTFORCE 2 VTTFORCE 3 VDD 4 8 VDDQ 7 VREFOUT 6 SHDN 5 VTTSENSE 8-Lead MLP Package 5x6mm = = as measured on FAN1655MP Eval Board MLP 1, 4 2, 3 PAD Pin eTSSOP 1, 2, 7 3, 6 4, 5, 8 10 11 9, 16 SOIC-14 1, 2, 7 3, 6 4, 5, 8 9 10

PDF Datasheet Preview

FAN1655 3A DDR Bus Termination Regulator

January 2006

FAN1655 3A DDR Bus Termination Regulator

The FAN1655 is a low-cost bi-directional LDO designed for terminating DDR memory bus. It can both sink and source up to 2.1A continuous, 3A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = VREFOUT ± 40mV.

The FAN1655 includes a buffered reference voltage capable of supplying up to 5mA current. On-chip thermal limiting provides protection against a combination of power overload and ambient temperature that would create an excessive junction temperature. A shutdown input puts the FAN1655 into a low power mode.

The FAN1655 regulator is available in a power-enhanced eTSSOP -16, standard SOIC-14, and an 8-Lead MLP package.
• Sinks and sources 2.1A continuous, 3A peak
• 0 to +125°C operating temperature range
• 5mA Buffered VREFOUT = VDDQ/2
• Load regulation VTT = VREFOUT ± 40mV
• On-chip thermal limiting
• Low Cost SO-14, Power-Enhanced eTSSOP or
8-pin 5x6mm MLP packages
• Low-Current Shutdown Mode
• Output Short Circuit Protection
• DDR Terminator VTT supply
Ordering Information

Temperature Range

FAN1655M FAN1655MX
0°C to 125°C 0°C to 125°C

FAN1655MTF FAN1655MTFX FAN1655MPX
0°C to 125°C 0°C to 125°C 0°C to 125°C

Block Diagram

Package SOIC-14 SOIC-14 eTSSOP-16 eTSSOP-16 MLP-8

VDDQ

VDD SHDN

VREFOUT VREFIN
200k + +
200k

FAN1655

VSSQ

Packing Rails

Tape and Reel Rails

Tape and Reel Tape and Reel

VTTFORCE VTTSENSE
2006 Fairchild Semiconductor Corporation

FAN1655 3A DDR Bus Termination Regulator

Pin Assignments

VDD 1 VDD 2 VTTFORCE 3 VSS 4 VSS 5 VTTFORCE 6 VDD 7 VSS 8
16 NC 15 VDDQ 14 VREFOUT FAN1655 13 VSSQ 12 SHDN 11 VREFIN 10 VTTSENSE
16-Lead Plastic eTSSOP-16 =
*Thermal impedance is measured with the power pad soldered to a square inch copper area. The copper area should be connected to Vss ground and positioned over an internal power or ground plane to assist in heat dissipation.

VDD 1 VDD 2 VTTFORCE 3 VSS 4 VSS 5 VTTFORCE 6 VDD 7
14 VDDQ 13 VREFOUT 12 VSSQ FAN1655M 11 SHDN 10 VREFIN
9 VTTSENSE 8 VSS
14-Lead Plastic SOIC = =

VDD 1 VTTFORCE 2 VTTFORCE 3

VDD 4
8 VDDQ 7 VREFOUT 6 SHDN 5 VTTSENSE
8-Lead MLP Package 5x6mm = =
as measured on FAN1655MP Eval Board

MLP 1, 4 2, 3 PAD

Pin eTSSOP
1, 2, 7 3, 6
4, 5, 8 10 11
9, 16

SOIC-14 1, 2, 7 3, 6 4, 5, 8 9 10

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Datasheet ID: FAN1655MTFX 513878