DM74LS377N

DM74LS377N Datasheet

DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock

Part	Datasheet
DM74LS377N	DM74LS377N (pdf)

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DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock The DM74LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the space-saving inch row spacing 20-pin package. s 8-bit high speed parallel registers s Positive edge-triggered D-type flip-flops s Fully buffered common clock and enable inputs Ordering Code: Order Number Package Number Package Description DM74LS377WM M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide DM74LS377N N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram VCC = Pin 20 GND = Pin 10 Pin Descriptions Pin Names Enable Input Active LOW Data Inputs Clock Pulse Input Active Rising Edge Flip-Flop Outputs Truth Table Inputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Output Qn No Change 2000 Fairchild Semiconductor Corporation DS009831 DM74LS377 Functional Description The DM74LS377 consists of eight edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock CP and Enable input E are common to all flip-flops. When E is LOW, new data is entered into the register on the next LOW-to-HIGH transition of CP. When E is HIGH, the register will retain the present data independent of the CP. Logic Diagram DM74LS377 Absolute Maximum Ratings Note 1 Supply Voltage Input Voltage Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions VCC VIH VIL IOH IOL TA tS H tS L tH H tH L tS H tS L tH H tH L tW H tW L Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature Setup Time HIGH or LOW Dn to CP Hold Time HIGH or LOW Dn to CP Setup Time HIGH or LOW E to CP Hold Time HIGH or LOW E to CP Pulse Width HIGH or LOW Units 10 ns 10 ns 20 ns Electrical Characteristics over recommended operating free air temperature range unless otherwise noted Parameter Conditions Input Clamp Voltage VCC = Min, II = −18 mA HIGH Level Output Voltage VCC = Min, IOH = Max

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DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock

DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock

The DM74LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the space-saving inch row spacing 20-pin package.
s 8-bit high speed parallel registers s Positive edge-triggered D-type flip-flops s Fully buffered common clock and enable inputs
Ordering Code:

Order Number Package Number

Package Description

DM74LS377WM

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide

DM74LS377N

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

VCC = Pin 20 GND = Pin 10

Pin Descriptions

Pin Names

Enable Input Active LOW Data Inputs Clock Pulse Input Active Rising Edge Flip-Flop Outputs

Truth Table

Inputs

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

Output

Qn No Change
2000 Fairchild Semiconductor Corporation DS009831

DM74LS377

Functional Description

The DM74LS377 consists of eight edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock CP and Enable input E are common to all flip-flops. When E is LOW, new data is entered into the register on the next LOW-to-HIGH transition of CP. When E is HIGH, the register will retain the present data independent of the CP.

Logic Diagram

DM74LS377

Absolute Maximum Ratings Note 1

Supply Voltage

Input Voltage

Operating Free Air Temperature Range 0°C to +70°C

Storage Temperature Range
−65°C to +150°C

Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Recommended Operating Conditions

VCC VIH VIL IOH IOL TA tS H tS L tH H tH L tS H tS L tH H tH L tW H tW L

Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature Setup Time HIGH or LOW Dn to CP Hold Time HIGH or LOW Dn to CP Setup Time HIGH or LOW E to CP Hold Time HIGH or LOW E to CP Pulse Width HIGH or LOW

Units
10 ns
10 ns
20 ns

Electrical Characteristics
over recommended operating free air temperature range unless otherwise noted

Parameter

Conditions

Input Clamp Voltage

VCC = Min, II = −18 mA

HIGH Level

Output Voltage

VCC = Min, IOH = Max

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived DM74LS377N Datasheet file may be downloaded here without warranties.

Datasheet ID: DM74LS377N 513799