DM74ALS574AWM

DM74ALS574AWM Datasheet

DM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs

Part	Datasheet
DM74ALS574AWM	DM74ALS574AWM (pdf)

Related Parts	Information
DM74ALS574ASJX	DM74ALS574ASJX
DM74ALS574ASJ	DM74ALS574ASJ
DM74ALS574AN	DM74ALS574AN
DM74ALS574AWMX	DM74ALS574AWMX

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DM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs DM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the DM74ALS574A are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs. A buffered output control input can be used to place the eight outputs in either a normal logic state HIGH or LOW logic levels or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF. s Switching specifications at 50 pF s Switching specifications guaranteed over full tempera- ture and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally equivalent with DM74LS374 s Improved AC performance over DM74LS374 at approxi- mately half the power s 3-STATE buffer-type outputs drive bus lines directly Ordering Code: Order Number Package Number Package Description DM74ALS574AWM M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide DM74ALS574ASJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide DM74ALS574AN N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram 2000 Fairchild Semiconductor Corporation DS006110 DM74ALS574A Function Table Output Control Clock L = LOW State H = HIGH State X = Don’t Care = Positive Edge Transition Z = High Impedance State Q0 = Previous Condition of Q Output D Logic Diagram DM74ALS574A Absolute Maximum Ratings Note 1 Supply Voltage Input Voltage Voltage Applied to Disabled Output 5.5V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C Typical N Package 56.0°C/W M Package 75.0°C/W Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current fCLOCK Clock Frequency HIGH Width of Clock Pulse Data Setup Time Note 2 Data Hold Time Note 2 Free Air Operating Temperature Note 2 The arrow indicates the positive edge of the Clock is used for reference.

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DM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs

DM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs

These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the DM74ALS574A are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs.

A buffered output control input can be used to place the eight outputs in either a normal logic state HIGH or LOW logic levels or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly.

The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF.
s Switching specifications at 50 pF s Switching specifications guaranteed over full tempera-
ture and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL
process s Functionally equivalent with DM74LS374 s Improved AC performance over DM74LS374 at approxi-
mately half the power s 3-STATE buffer-type outputs drive bus lines directly
Ordering Code:

Order Number Package Number

Package Description

DM74ALS574AWM

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide

DM74ALS574ASJ

M20D
20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide

DM74ALS574AN

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram
2000 Fairchild Semiconductor Corporation DS006110

DM74ALS574A

Function Table

Output Control

Clock

L = LOW State H = HIGH State X = Don’t Care = Positive Edge Transition Z = High Impedance State Q0 = Previous Condition of Q

Output D

Logic Diagram

DM74ALS574A

Absolute Maximum Ratings Note 1

Supply Voltage

Input Voltage

Voltage Applied to Disabled Output
5.5V

Operating Free Air Temperature Range 0°C to +70°C

Storage Temperature Range
−65°C to +150°C

Typical N Package
56.0°C/W

M Package
75.0°C/W

Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Recommended Operating Conditions

Parameter

Supply Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

HIGH Level Output Current

LOW Level Output Current
fCLOCK

Clock Frequency

HIGH

Width of Clock Pulse

Data Setup Time

Note 2

Data Hold Time

Note 2

Free Air Operating Temperature

Note 2 The arrow indicates the positive edge of the Clock is used for reference.

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Datasheet ID: DM74ALS574AWM 513693