DM74ALS169BM
DM74ALS169BM Datasheet
DM74ALS169B Synchronous Four-Bit Up/Down Counters
| Part | Datasheet |
|---|---|
DM74ALS169BM |
DM74ALS169BM (pdf) |
| Related Parts | Information |
|---|---|
|
DM74ALS169BMX |
DM74ALS169BMX |
DM74ALS169BN |
DM74ALS169BN |
| PDF Datasheet Preview |
|---|
| DM74ALS169B Synchronous Four-Bit Up/Down Counters DM74ALS169B Synchronous Four-Bit Up/Down Counters These synchronous presettable counters feature an internal carry look ahead for cascading in high speed counting applications. The DM74ALS169B is a four-bit binary up/ down counter. The carry output is decoded to prevent spikes during normal mode of counting operation. Synchronous operation is provided so that outputs change coincident with each other when so instructed by count enable inputs and internal gating. This mode of operation eliminates the output counting spikes which are normally associated with asynchronous ripple clock counters. A buffered clock input triggers the four flip-flops on the rising positive going edge of clock input waveform. These counters are fully programmable that is, the outputs may each be preset either HIGH or LOW. The load input circuitry allows loading with carry-enable output of cascaded counters. As loading is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the data inputs after the next clock pulse. The carry look-ahead circuitry permits cascading counters for n-bit synchronous applications without additional gating. Both count enable inputs P and T must be LOW to count. The direction of the count is determined by the level of the up/down input. When the input is HIGH, the counter counts UP when LOW, it counts DOWN. Input T is fed forward to enable the carry outputs. The carry output thus enabled will produce a low level output pulse with a duration approximately equal to the high portion of the QA output when counting UP, and approximately equal to the low portion of the QA when counting DOWN. This low level overflow carry pulse can be used to enable successively cascaded stages. Transitions at the enable P or T inputs are allowed regardless of the level of the clock input. The control functions for these counters are fully synchronous. Changes at control inputs enable P, enable T, load, up/down which modify the operating mode have no effect until clocking occurs. The function of the counter whether enabled, disabled, loading or counting will be dictated solely by the conditions meeting the stable setup and hold times. s Switching specifications at 50 pF s Switching specifications guaranteed over full tempera- ture and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally and pin-for-pin compatible with Schottky and low power Schottky TTL counterpart s Improved AC performance over Schottky and low power Schottky counterparts s Synchronously programmable s Internal look ahead for fast counting s Carry output for n-bit cascading s Synchronous counting s ESD inputs Ordering Code: Order Number Package Number Package Description DM74ALS169BM M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow DM74ALS169BN N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. 2000 Fairchild Semiconductor Corporation DS006207 DM74ALS169B Connection Diagram Mode Select Table LOAD EP Action on Rising Clock Edge X Load Pn Qn H Count Up Increment L Count Down Decrement X No Change Hold X No Change Hold State Diagram DM74ALS169B Logic Diagram DM74ALS169B Absolute Maximum Ratings Note 1 Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Typical N Package M Package 7V 0°C to +70°C −65°C to +150°C 78.1°C/W 106.8°C/W Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current fCLK Clock Frequency Setup Time Note 2 Data; A, B, C, D En P, En T Load Hold Time Note 2 Data; A, B, C, D En P, En T Load |
| More datasheets: M4776 SL005 | M4776 SL002 | CY29775AXIT | CY29775AXI | B82144A2984A | B82144A2305A500 | B82144A2145A500 | B82144A2265A | NX4025DA-13.000000MHZ-B6 | DM74ALS169BMX |
Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived DM74ALS169BM Datasheet file may be downloaded here without warranties.