CD4049UBC<br>• CD4050BC Hex Inverting Buffer<br>• Hex Non-Inverting Buffer
Part | Datasheet |
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CD4049UBCM (pdf) |
Related Parts | Information |
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CD4049UBCN |
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CD4050BCMX |
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CD4050BCN |
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CD4050BCM |
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CD4049UBCMX |
PDF Datasheet Preview |
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CD4049UBC • CD4050BC Hex Inverting Buffer • Hex Non-Inverting Buffer CD4049UBC • CD4050BC Hex Inverting Buffer • Hex Non-Inverting Buffer The CD4049UBC and CD4050BC hex buffers are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. These devices feature logic level conversion using only one supply voltage VDD . The input signal high level VIH can exceed the VDD supply voltage when these devices are used for logic level conversions. These devices are intended for use as hex buffers, CMOS to DTL/ TTL converters, or as CMOS current drivers, and at VDD = 5.0V, they can drive directly two DTL/TTL loads over the full operating temperature range. s Wide supply voltage range 3.0V to 15V s Direct drive to 2 TTL loads at 5.0V over full temperature range s High source and sink current capability s Special input protection permits input voltages greater than VDD • CMOS hex inverter/buffer • CMOS to DTL/TTL hex converter • CMOS current “sink” or “source” driver • CMOS HIGH-to-LOW logic level converter Ordering Code: Order Number Package Number Package Description CD4049UBCM M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow CD4049UBCN N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide CD4050BCM M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow CD4050BCN N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams Pin Assignments for DIP CD4049UBC CD4050BC Top View 2002 Fairchild Semiconductor Corporation DS005971 Top View CD4049UBC • CD4050BC Schematic Diagrams CD4049UBC 1 of 6 Identical Units CD4050BC 1 of 6 Identical Units CD4049UBC • CD4050BC Absolute Maximum Ratings Note 1 Note 2 Supply Voltage VDD Input Voltage VIN Voltage at Any Output Pin VOUT Storage Temperature Range TS Power Dissipation PD Dual-In-Line Small Outline Lead Temperature TL Soldering, 10 seconds −0.5V to +18V −0.5V to +18V −0.5V to VDD + 0.5V −65°C to +150°C 700 mW 500 mW 260°C Recommended Operating Conditions Note 2 Supply Voltage VDD Input Voltage VIN Voltage at Any Output Pin VOUT Operating Temperature Range TA CD4049UBC, CD4050BC 3V to 15V 0V to 15V 0 to VDD −55°C to +125°C Note 1 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Note 2 VSS = 0V unless otherwise specified. DC Electrical Characteristics Note 3 Parameter Quiescent Device Current LOW Level Output Voltage HIGH Level Output Voltage LOW Level Input Voltage CD4050BC Only LOW Level Input Voltage CD4049UBC Only HIGH Level Input Voltage CD4050BC Only HIGH Level Input Voltage |
More datasheets: 89750101 | 89750109 | 89750103 | 88950100 | ADNS-7010 | 10133 | B39421B3552U310 | CD4049UBCN | CD4050BCMX | CD4050BCN |
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