CD4013BCSJ

CD4013BCSJ Datasheet

CD4013BC Dual D-Type Flip-Flop

Part	Datasheet
CD4013BCSJ	CD4013BCSJ (pdf)

Related Parts	Information
CD4013BCMX	CD4013BCMX
CD4013BCSJX	CD4013BCSJX
CD4013BCM	CD4013BCM
CD4013BCN	CD4013BCN

PDF Datasheet Preview
CD4013BC Dual D-Type Flip-Flop CD4013BC Dual D-Type Flip-Flop The CD4013B dual D-type flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independent data, set, reset, and clock inputs and “Q” and “Q” outputs. These devices can be used for shift register applications, and by connecting “Q” output to the data input, for counter and toggle applications. The logic level present at the “D” input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line respectively. s Wide supply voltage range 3.0V to 15V s High noise immunity VDD typ. s Low power TTL fan out of 2 driving 74L compatibility or 1 driving 74LS • Automotive • Data terminals • Instrumentation • Medical electronics • Alarm system • Industrial electronics • Remote metering • Computers Ordering Code: Order Number Package Number Package Description CD4013BCM M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow CD4013BCSJ M14D 14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide CD4013BCN N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table Top View Note 1 No Change x = Don't Care Case Note 1 Level Change 2002 Fairchild Semiconductor Corporation DS005946 CD4013BC Schematic Diagrams Logic Diagram CD4013BC Absolute Maximum Ratings Note 2 Note 3 Recommended Operating Conditions Note 3 DC Supply Voltage VDD VDC to +18 VDC Input Voltage VIN VDC to VDD VDC Storage Temperature Range TS −65°C to +150°C Power Dissipation PD Dual-In-Line 700 mW Small Outline 500 mW Lead Temperature TL Soldering, 10 seconds 260°C DC Supply Voltage VDD +3 VDC to +15 VDC Input Voltage VIN 0 VDC to VDD VDC Operating Temperature Range TA −55°C to +125°C Note 2 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices should be operated at these limits. The tables of “Recommended Operating Conditions” and “Electrical Characteristics” provide conditions for actual device operation. Note 3 VSS = 0V unless otherwise specified. DC Electrical Characteristics Note 3 Parameter Conditions Quiescent Device VDD = 5V, VIN = VDD or VSS

PDF Datasheet Preview

CD4013BC Dual D-Type Flip-Flop

CD4013BC Dual D-Type Flip-Flop

The CD4013B dual D-type flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independent data, set, reset, and clock inputs and “Q” and “Q” outputs. These devices can be used for shift register applications, and by connecting “Q” output to the data input, for counter and toggle applications. The logic level present at the “D” input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line respectively.
s Wide supply voltage range 3.0V to 15V s High noise immunity VDD typ. s Low power TTL fan out of 2 driving 74L
compatibility or 1 driving 74LS
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Alarm system
• Industrial electronics
• Remote metering
• Computers
Ordering Code:

Order Number Package Number

Package Description

CD4013BCM

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

CD4013BCSJ

M14D
14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide

CD4013BCN

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Truth Table

Top View

Note 1

No Change x = Don't Care Case

Note 1 Level Change
2002 Fairchild Semiconductor Corporation DS005946

CD4013BC

Schematic Diagrams

Logic Diagram

CD4013BC

Absolute Maximum Ratings Note 2

Note 3

Recommended Operating Conditions Note 3

DC Supply Voltage VDD

VDC to +18 VDC

Input Voltage VIN

VDC to VDD VDC

Storage Temperature Range TS
−65°C to +150°C

Power Dissipation PD

Dual-In-Line
700 mW

Small Outline
500 mW

Lead Temperature TL Soldering, 10 seconds
260°C

DC Supply Voltage VDD
+3 VDC to +15 VDC

Input Voltage VIN
0 VDC to VDD VDC

Operating Temperature Range TA
−55°C to +125°C

Note 2 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices should be operated at these limits. The tables of “Recommended Operating Conditions” and “Electrical Characteristics” provide conditions for actual device operation.

Note 3 VSS = 0V unless otherwise specified.

DC Electrical Characteristics Note 3

Parameter

Conditions

Quiescent Device

VDD = 5V, VIN = VDD or VSS

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CD4013BCSJ Datasheet file may be downloaded here without warranties.

Datasheet ID: CD4013BCSJ 513549